- 您现在的位置：买卖IC网 > PDF目录16986 > MAX1181EVKIT (Maxim Integrated Products)EVAL KIT FOR MAX1181 PDF资料下载
参数资料
| 型号： | MAX1181EVKIT |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 3/20页 |
| 文件大小： | 0K |
| 描述： | EVAL KIT FOR MAX1181 |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 1 |
| ADC 的数量： | 1 |
| 位数： | 10 |
| 采样率（每秒）： | 80M |
| 数据接口： | 并联 |
| 输入范围： | 2 Vpp |
| 在以下条件下的电源（标准）： | 246W @ 80MSPS |
| 工作温度： | -40°C ~ 85°C |
| 已用 IC / 零件： | MAX1180，1181，1182，1183，1184，1185，1186，1190 |
| 已供物品： | 板 |
For stability and noise filtering purposes, bypass REFIN
with a > 10nF capacitor to GND. In internal reference
mode, REFOUT, COM, REFP, and REFN become low-
impedance outputs.
In the buffered external reference mode, adjust the ref-
erence voltage levels externally by applying a stable
and accurate voltage at REFIN. In this mode, COM,
REFP, and REFN become outputs. REFOUT may be left
open or connected to REFIN through a > 10k
Ω resistor.
In the unbuffered external reference mode, connect
REFIN to GND. This deactivates the on-chip reference
buffers for REFP, COM, and REFN. With their buffers
shut down, these nodes become high impedance and
may be driven through separate external reference
sources.
Clock Input (CLK)
The MAX1181’s CLK input accepts CMOS-compatible
clock signals. Since the interstage conversion of the
device depends on the repeatability of the rising and
falling edges of the external clock, use a clock with low
jitter and fast rise and fall times (< 2ns). In particular,
sampling occurs on the rising edge of the clock signal,
requiring this edge to provide lowest possible jitter. Any
significant aperture jitter would limit the SNR perfor-
mance of the on-chip ADCs as follows:
SNR = 20 log10 (1 / [2
π x fIN tAJ]),
where fIN represents the analog input frequency and
tAJ is the time of the aperture jitter.
Clock jitter is especially critical for undersampling
applications. The clock input should always be consid-
ered as an analog input and routed away from any ana-
log input or other digital signal lines.
The MAX1181 clock input operates with a voltage thresh-
old set to VDD / 2. Clock inputs with a duty cycle other
than 50% must meet the specifications for high and low
periods as stated in the Electrical Characteristics table.
System Timing Requirements
Figure 3 depicts the relationship between the clock
input, analog input, and data output. The MAX1181
samples at the rising edge of the input clock. Output
data for channels A and B is valid on the next rising
edge of the input clock. The output data has an internal
latency of five clock cycles. Figure 4 also determines
the relationship between the input clock parameters
and the valid output data on channels A and B.
Digital Output Data, Output Data Format
Selection (T/B), Output Enable (
OE)
All digital outputs, D0A–D9A (Channel A) and D0B–D9B
(Channel B), are TTL/CMOS logic-compatible. There is a
MAX1181
Dual 10-Bit, 80Msps, 3V, Low-Power ADC
with Internal Reference and Parallel Outputs
______________________________________________________________________________________
11
T/H
VOUT
x2
Σ
FLASH
ADC
DAC
1.5 BITS
10
VINA
VIN
STAGE 1
STAGE 2
D9A–D0A
VINA = INPUT VOLTAGE BETWEEN INA+ AND INA- (DIFFERENTIAL OR SINGLE-ENDED)
VINB = INPUT VOLTAGE BETWEEN INB+ AND INB- (DIFFERENTIAL OR SINGLE-ENDED)
DIGITAL CORRECTION LOGIC
STAGE 8
STAGE 9
2-BIT FLASH
ADC
T/H
VOUT
x2
Σ
FLASH
ADC
DAC
1.5 BITS
10
VINB
VIN
STAGE 1
STAGE 2
D9B–D0B
DIGITAL CORRECTION LOGIC
STAGE 8
STAGE 9
2-BIT FLASH
ADC
T/H
Figure 1. Pipelined Architecture––Stage Blocks
相关PDF资料 |
PDF描述 |
|---|---|
| VI-27Y-EW | CONVERTER MOD DC/DC 3.3V 66W |
| VE-241-EY | CONVERTER MOD DC/DC 12V 50W |
| VI-27X-EY | CONVERTER MOD DC/DC 5.2V 50W |
| VE-20Y-EX | CONVERTER MOD DC/DC 3.3V 49.5W |
| RBC19DRXS | CONN EDGECARD 38POS DIP .100 SLD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX1182ECM | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| MAX1182ECM+D | 功能描述:模数转换器 - ADC 10-Bit 2Ch 65Msps High Speed ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1182ECM+TD | 功能描述:模数转换器 - ADC 10-Bit 2Ch 65Msps High Speed ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1182ECM-D | 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1182ECM-T | 制造商:Maxim Integrated Products 功能描述:- Tape and Reel |
发布紧急采购，3分钟左右您将得到回复。