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参数资料
| 型号： | MAX12005ETM+T |
| 厂商： | Maxim Integrated |
| 文件页数： | 12/14页 |
| 文件大小： | 0K |
| 描述： | IC SATELLITE IF SWITCH 48-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| RF 型： | DBS，L 频段，IF 卫星 |
| 频率： | 850MHz ~ 1GHz |
| 封装/外壳： | 48-WFQFN 裸露焊盘 |
| 供应商设备封装： | 48-TQFN-EP（7x7） |
| 包装： | 带卷 (TR) |
Satellite IF Switch
Table 2. DiSEqC Slave Control Interface Command Bytes (continued)
HEX VALUE
0x38
0x50
COMMAND
Write N0
LO string
FUNCTION
Write to port group 0
Controls Switch_reg, bits 7 downto 4 (Note 1)
Read current frequency
Reads Low_LOF_reg2/1 or High_LOF_reg2/1
depending on Switch_reg, bit 4 (Note 2)
DATA BYTES
1 byte
—
SLAVE REPLY
Framing byte
Framing + 2 data
bytes
Read current frequency table entry number
0x51
LO now
Reads Low_LOF_reg0, bit 3 downto 0 or
High_LOF_reg0, bit 3 downto 0
—
Framing + data
byte
depending on Switch_reg, bit 4
0x52
0x53
LO Lo
LO Hi
Read low-frequency table entry number
Reads Low_LOF_reg0, bit 3 downto 0
Read high-frequency table entry number
Reads High_LOF_reg0, bit 3 downto 0
—
—
Framing + data
byte
Framing + data
byte
Note 1: Refer to DiSEqC Bus Functional Specification version 4.2, page 18.
Note 2: Refer to DiSEqC Bus Functional Specification version 4.2, page 22.
Table 3. DiSEqC Slave Control Interface Registers
ADDRESS
Address_reg
Status_reg
Configuration_reg
BIT
7:0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
ACC
RW
RW
R
—
R
—
RW
RW
RW
R
R
R
R
R
R
R
R
NAME
address
contention
standby
Unused
aux_power
Unused
voltage
sleep
reset
analog
standby
positioner
power_detection
loop_through
polarizer
switch
lof_values
FUNCTION
DiSEqC address
Bus contention flag
Standby mode
—
Auxiliary power available
—
0 = Low DC, 1 = High DC
0 = Awake, 1 = Sleep
Reset flag
Analog output facility
Standby facility
Positioner capability
External power-detection capability
Loopthrough facility
Polarizer capability
Switcher capability
LOF value output capability
DEFAULT
LNB: 0x11
Switch: 0x14
0
0
—
0
—
Depends on
voltage input
0
1
0
0
0
0
0
0
1
1
12
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