参数资料
型号: MAX1232CPA+
厂商: Maxim Integrated Products
文件页数: 4/6页
文件大小: 0K
描述: IC MPU SUPERVISORY CIRCUIT 8-DIP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
类型: 简单复位/加电复位
监视电压数目: 1
输出: 开路漏极或开路集电极
复位: 高有效/低有效
复位超时: 最小为 250 ms
电压 - 阀值: 4.37V,4.62V
工作温度: 0°C ~ 70°C
安装类型: 通孔
封装/外壳: 8-DIP(0.300",7.62mm)
供应商设备封装: 8-PDIP
包装: 管件
产品目录页面: 1414 (CN2011-ZH PDF)
Microprocessor Monitor
Detailed Description
Power Monitor
A voltage detector monitors V CC and holds the reset
outputs (RST and RST ) in their active states whenever
V CC is below the selected 5% or 10% tolerance (4.62V
or 4.37V, typically). To select the 5% level, connect
TOL to ground. To select the 10% level, connect TOL to
V CC . The reset outputs will remain in their active states
until V CC has been continuously in-tolerance for a mini-
mum of 250ms (the reset active time) to allow the
power supply and μP to stabilize.
The RST output both sinks and sources current, while
the RST output, an open-drain MOSFET, sinks current
only and must be pulled high.
Pushbutton Reset Input
The MAX1232 ’s debounced manual reset input
( PBRST ) manually forces the reset outputs into their
active states. The reset outputs go active after PBRST
has been held low for a time t PBD , the pushbutton reset
delay time. The reset outputs remain in their active
states for a minimum of 250ms after PBRST rises above
V IH (Figure 3).
A mechanical pushbutton or an active logic signal can
drive the PBRST input. The debounced input ignores
Watchdog Timer
The microprocessor drives the ST input with an
input/output (I/O) line. The microprocessor must toggle
the ST input within a set period (as determined by TD)
to verify proper software execution. If a hardware or
software failure keeps ST from toggling within the mini-
mum timeout period— ST is activated only by falling
edges (a high-to-low transition)—the MAX1232 reset
outputs are forced to their active states for 250ms
(Figure 2). This typically initiates the microprocessor’s
power-up routine. If the interruption continues, new
reset pulses are generated each timeout period until ST
is strobed. The timeout period is determined by the TD
input connection. This timeout period is typically 150ms
with TD connected to GND, 600ms with TD floating, or
1200ms with TD connected to V CC .
The software routine that strobes ST is critical. The
code must be in a section of software that executes fre-
quently enough so the time between toggles is less
than the watchdog timeout period. One common tech-
nique controls the microprocessor I/O line from two
sections of the program. The software might set the I/O
line high while operating in the foreground mode, and
set it low while in the background or interrupt mode. If
both modes do not execute correctly, the watchdog
timer issues reset pulses.
input pulses less than 1ms and is guaranteed to recog-
nize pulses of 20ms or greater. The PBRST input has
an internal pullup to V CC of about 100μA; therefore, an
external pullup resistor is not necessary.
+5V
+5V
10k ?
V CC
PB RST
MAX1232
TD
ST
RST
I/O
MICROPROCESSOR
RESET
+8V
7805
3-TERMINAL
REGULATOR
+5V
0.1 μ F
V CC
MAX1232
RST
RESET
MICROPROCESSOR
ST
I/O
GND
TOL
TD
TOL
GND
Figure 1. Pushbutton Reset
Figure 2. Watchdog Timer
4
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MAX1232CSA+ 功能描述:监控电路 MPU Monitor RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟(典型值):10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel
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