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参数资料
| 型号： | MAX1247AMJE |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | ADC |
| 英文描述： | CAP .015UF 50V PPS FILM 1210 5% |
| 中文描述： | 4-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDIP16 |
| 封装： | CERDIP-16 |
| 文件页数： | 8/24页 |
| 文件大小： | 223K |
| 代理商： | MAX1247AMJE |
M
+2.7V, Low-Power, 4-Channel,
S erial 12-Bit ADCs in QS OP-16
8
_______________________________________________________________________________________
NAME
FUNCTION
1
V
DD
Positive Supply Voltage
2–5
CH0–CH3
Sampling Analog Inputs
PIN
6
COM
Ground reference for analog inputs. COM sets zero-code voltage in single-ended mode. Must be
stable to ±0.5LSB.
7
SHDN
Three-Level Shutdown Input. Pulling
SHDN
low shuts the MAX1246/MAX1247 down; otherwise, they
are fully operational. Pulling
SHDN
high puts the reference-buffer amplifier in internal compensation
mode. Letting
SHDN
float puts the reference-buffer amplifier in external compensation mode.
12
DOUT
Serial Data Output. Data is clocked out at SCLK’s falling edge. High impedance when
CS
is high.
11
DGND
Digital Ground
10
AGND
Analog Ground
8
VREF
Reference-Buffer Output/ADC Reference Input. Reference voltage for analog-to-digital conversion.
In internal reference mode (MAX1246 only), the reference buffer provides a 2.500V nominal output,
externally adjustable at REFADJ . In external reference mode, disable the internal buffer by pulling
REFADJ to V
DD
.
16
SCLK
Serial Clock Input. Clocks data in and out of serial interface. In external clock mode, SCLK also sets
the conversion speed. (Duty cycle must be 40% to 60%.)
15
CS
Active-Low Chip Select. Data will not be clocked into DIN unless
CS
is low. When
CS
is high, DOUT is
high impedance.
14
DIN
Serial Data Input. Data is clocked in at SCLK’s rising edge.
13
SSTRB
Serial Strobe Output. In internal clock mode, SSTRB goes low when the MAX1246/MAX1247 begin the
A/D conversion, and goes high when the conversion is finished. In external clock mode, SSTRB pulses
high for one clock period before the MSB decision. High impedance when
CS
is high (external clock
mode).
______________________________________________________________Pin Desc ription
V
DD
6k
DGND
DOUT
C
LOAD
50pF
C
LOAD
50pF
DGND
6k
DOUT
a) High-Z to V
OH
and V
OL
to V
OH
b) High-Z to V
OL
and V
OH
to V
OL
V
DD
6k
DGND
DOUT
C
LOAD
50pF
C
LOAD
50pF
DGND
6k
DOUT
a) V
OH
to High-Z
b) V
OL
to High-Z
Figure 1. Load Circuits for Enable Time
Figure 2. Load Circuits for Disable Time
9
REFADJ
Input to the Reference-Buffer Amplifier. To disable the reference-buffer amplifier, tie REFADJ to V
DD
.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX1247BCEE | 功能描述:模数转换器 - ADC Integrated Circuits (ICs) RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1247BCEE+ | 功能描述:模数转换器 - ADC 12-Bit 4Ch 133ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1247BCEE+T | 功能描述:模数转换器 - ADC 12-Bit 4Ch 133ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1247BCEE-T | 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1247BCPE | 功能描述:模数转换器 - ADC Integrated Circuits (ICs) RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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