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参数资料
| 型号： | MAX1282BCUE+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 3/23页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 300KSPS 16-TSSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 位数： | 12 |
| 采样率（每秒）： | 300k |
| 数据接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 13.75mW |
| 电压电源： | 单电源 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 16-TSSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 4 个单端，单极；4 个单端，双极；2 个伪差分，单极；2 个伪差分，双极 |
Detailed Description
The MAX1282/MAX1283 ADCs use a successive-
approximation conversion technique and input T/H cir-
cuitry to convert an analog signal to a 12-bit digital out-
put. A flexible serial interface provides easy interface to
microprocessors (Ps). Figure 3 shows a functional dia-
gram of the MAX1282/MAX1283.
Pseudo-Differential Input
The equivalent circuit of Figure 4 shows the MAX1282/
MAX1283’s input architecture, which is composed of a
T/H, input multiplexer, input comparator, switched-
capacitor DAC, and reference.
In single-ended mode, the positive input (IN+) is con-
nected to the selected input channel and the negative
input (IN-) is set to COM. In differential mode, IN+ and
IN- are selected from the following pairs: CH0/CH1 and
CH2/CH3. Configure the channels according to Tables
1 and 2.
The MAX1282/MAX1283 input configuration is pseudo-
differential because only the signal at IN+ is sampled.
The return side (IN-) is connected to the sampling
capacitor while converting and must remain stable
within ±0.5LSB (±0.1LSB for best results) with respect
to GND during a conversion.
If a varying signal is applied to the selected IN-, its
amplitude and frequency must be limited to maintain
accuracy. The following equations express the relation-
ship between the maximum signal amplitude and its
frequency to maintain ±0.5LSB accuracy. Assuming a
sinusoidal signal at IN-, the input voltage is determined
by:
The maximum voltage variation is determined by:
A 0.65Vp-p, 60Hz signal at IN- will generate a ±0.5LSB
error when using a +2.5V reference voltage and a
2.5s conversion time (15 / fSCLK). When a DC refer-
ence voltage is used at IN-, connect a 0.1F capacitor
to GND to minimize noise at the input.
During the acquisition interval, the channel selected as
the positive input (IN+) charges capacitor CHOLD. The
acquisition interval spans three SCLK cycles and ends
on the falling SCLK edge after the input control word’s
last bit has been entered. At the end of the acquisition
interval, the T/H switch opens, retaining charge on
CHOLD as a sample of the signal at IN+. The conver-
sion interval begins with the input multiplexer switching
CHOLD from IN+ to IN-. This unbalances node ZERO at
the comparator’s input. The capacitive DAC adjusts
during the remainder of the conversion cycle to restore
node ZERO to VDD1 / 2 within the limits of 12-bit resolu-
tion. This action is equivalent to transferring a
12pF (VIN+ - VIN-) charge from CHOLD to the binary-
weighted capacitive DAC, which in turn forms a digital
representation of the analog input signal.
max
d
dt
V2 f
1LSB
t
V
2t
CONV
REF
12
CONV
ν
π
IN
=
≤
=
()
MAX1282/MAX1283
300ksps/400ksps, Single-Supply, 4-Channel,
Serial 12-Bit ADCs with Internal Reference
______________________________________________________________________________________
11
INPUT
SHIFT
REGISTER
CONTROL
LOGIC
INT
CLOCK
OUTPUT
SHIFT
REGISTER
+1.22V
REFERENCE
T/H
ANALOG
INPUT
MUX
12-BIT
SAR ADC
IN
DOUT
SSTRB
VDD1
VDD2
GND
SCLK
DIN
COM
REFADJ
REF
OUT
REF
CLOCK
+2.500V
17k
7
8
9
6
11
12
13
14
15
CH1
3
CH2
4
CH3
5
CH0
2
MAX1282
MAX1283
CS
SHDN
1
16
10
2.05
A
≈
Figure 3. Functional Diagram
CHOLD
12pF
RIN
800
HOLD
INPUT
MUX
CSWITCH*
*INCLUDES ALL INPUT PARASITICS
SINGLE-ENDED MODE: IN+ = CH0–CH3, IN- = COM.
PSEUDO-DIFFERENTIAL MODE: IN+ AND IN- SELECTED FROM
PAIRS OF CH0/CH1 AND CH2/CH3.
AT THE SAMPLING INSTANT,
THE MUX INPUT SWITCHES FROM
THE SELECTED IN+ CHANNEL TO
THE SELECTED IN- CHANNEL.
CH0
REF
GND
CH1
CH2
CH3
COM
ZERO
VDD1/2
COMPARATOR
CAPACITIVE
DAC
6pF
TRACK
Figure 4. Equivalent Input Circuit
νπ
IN
V
sin(2 ft)
=
()
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相关代理商/技术参数 |
参数描述 |
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| MAX1282BEUE | 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1282BEUE+ | 功能描述:模数转换器 - ADC 12-Bit 4Ch 400ksps 5.5V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1282BEUE+T | 功能描述:模数转换器 - ADC 12-Bit 4Ch 400ksps 5.5V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1282BEUE-T | 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1282EVC16 | 功能描述:数据转换 IC 开发工具 MAX1282C16 Eval Kit RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V |
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