参数资料
型号: MAX1284EVC16
厂商: Maxim Integrated Products
文件页数: 14/15页
文件大小: 0K
描述: EVALUATION SYSTEM FOR MAX1284
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
ADC 的数量: 1
位数: 12
采样率(每秒): 400k
数据接口: 串行
输入范围: 0 ~ 2.5 V
在以下条件下的电源(标准): 13.75mW @ 400kSPS
工作温度: 0°C ~ 70°C
已用 IC / 零件: MAX1284
已供物品: 2 板,CD
Detailed Description
Converter Operation
The MAX1284/MAX1285 use an input T/H and succes-
sive-approximation register (SAR) circuitry to convert
an analog input signal to a digital 12-bit output. Figure
3 shows the MAX1284/MAX1285 in its simplest configu-
ration. The internal reference is trimmed to +2.5V. The
serial interface requires only three digital lines (SCLK,
CS, and DOUT) and provides an easy interface to
microprocessors (Ps).
The MAX1284/MAX1285 have two modes: normal and
shutdown. Pulling SHDN low shuts the device down and
reduces supply current to below 2A (typ), while pulling
SHDN high puts the device into operational mode. Pulling
CS low initiates a conversion that is driven by SCLK. The
conversion result is available at DOUT in unipolar serial
format. The serial data stream consists of three zeros,
followed by the data bits (MSB first). All transitions on
DOUT occur 20ns after the rising edge of SCLK. Figures
8 and 9 show the interface timing information.
Analog Input
Figure 4 illustrates the sampling architecture of the
ADC’s comparator. The full-scale input voltage is set by
the internal reference (VREF = +2.5V).
Track/Hold
In track mode, the analog signal is acquired and stored
in the internal hold capacitor. In hold mode, the T/H
switch opens and maintains a constant input to the
ADC’s SAR section.
During acquisition, the analog input (AIN) charges
capacitor CHOLD. Bringing CS low, ends the acquisition
interval. At this instant, the T/H switches the input side
of CHOLD to GND. The retained charge on CHOLD rep-
resents a sample of the input, unbalancing node ZERO
at the comparator’s input.
In hold mode, the capacitive digital-to-analog converter
(DAC) adjusts during the remainder of the conversion
cycle to restore node ZERO to 0 within the limits of 12-
bit resolution. This action is equivalent to transferring a
charge from CHOLD to the binary-weighted capacitive
DAC, which in turn forms a digital representation of the
analog input signal. At the conversion’s end, the input
MAX1284/MAX1285
400ksps/300ksps, Single-Supply, Low-Power,
Serial 12-Bit ADCs with Internal Reference
8
_______________________________________________________________________________________
DOUT
6k
Ω
DGND
CLOAD = 20pF
6k
Ω
DGND
VDD
b) High-Z to VOL and VOH to VOL
a) High-Z to VOH and VOL to VOH
Figure 1. Load Circuits for DOUT Enable Time
DOUT
6k
Ω
DGND
CLOAD = 20pF
6k
Ω
DGND
VDD
b) VOL to High-Z
a) VOH to High-Z
Figure 2. Load Circuits for DOUT Disable Time
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相关代理商/技术参数
参数描述
MAX1284EVKIT 功能描述:数据转换 IC 开发工具 MAX1284 Eval Kit RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V
MAX1285BCSA 功能描述:模数转换器 - ADC Integrated Circuits (ICs) RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32
MAX1285BCSA+ 功能描述:模数转换器 - ADC 12-Bit 300ksps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32
MAX1285BCSA+T 功能描述:模数转换器 - ADC 12-Bit 300ksps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32
MAX1285BCSA-T 功能描述:模数转换器 - ADC Integrated Circuits (ICs) RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32