参数资料
型号: MAX1312ECM+T
厂商: Maxim Integrated Products
文件页数: 33/37页
文件大小: 0K
描述: IC ADC 12BIT 8CH 4MSPS 48LQFP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,000
位数: 12
采样率(每秒): 3.65M
数据接口: 并联
转换器数目: 1
功率耗散(最大): 1.82W
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-LQFP(7x7)
包装: 带卷 (TR)
输入数目和类型: 8 个单端,单极
MAX1304–MAX1306/MAX1308–MAX1310/MAX1312–MAX1314
8-/4-/2-Channel, 12-Bit, Simultaneous-Sampling ADCs
with ±10V, ±5V, and 0 to +5V Analog Input Ranges
_______________________________________________________________________________________
5
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX1304/MAX1305/MAX1306,
all channels selected
1.3
2.6
MAX1308/MAX1309/MAX1310,
all channels selected
1.3
2.6
Digital Supply Current
(CLOAD = 100pF) (Note 7)
IDVDD
MAX1312/MAX1313/MAX1314,
all channels selected
1.3
2.6
mA
IAVDD
SHDN = DVDD, VCH = open
0.6
10
Shutdown Current
(Note 8)
IDVDD
SHDN = DVDD, RD = WR = high
0.02
1
A
Power-Supply Rejection Ratio
PSRR
VAVDD = +4.75V to +5.25V
50
dB
TIMING CHARACTERISTICS (Figure 1)
Internal clock, Figure 7
800
900
ns
Time to First Conversion Result
tCONV
External clock, Figure 8
12
CLK
Cycles
Internal clock, Figure 7
200
225
ns
Time to Subsequent Conversions
tNEXT
External clock, Figure 8
3
CLK
Cycles
CONVST Pulse-Width Low
(Acquisition Time)
tACQ
(Note 9) Figures 6–10
0.1
1000.0
s
CS Pulse Width
tCS
Figure 6
30
ns
RD Pulse-Width Low
tRDL
Figures 7, 8, 9
30
ns
RD Pulse-Width High
tRDH
Figures 7, 8, 9
30
ns
WR Pulse-Width Low
tWRL
Figure 6
30
ns
CS to WR
tCTW
Figure 6
(Note 10)
ns
WR to CS
tWTC
Figure 6
(Note 10)
ns
CS to RD
tCTR
Figures 7, 8, 9
(Note 10)
ns
RD to CS
tRTC
Figures 7, 8, 9
(Note 10)
ns
Data Access Time
(RD Low to Valid Data)
tACC
Figures 7, 8, 9
30
ns
Bus Relinquish Time (RD High)
tREQ
Figures 7, 8, 9
5
30
ns
CLK Rise to EOC Delay
tEOCD
Figure 8
20
ns
CLK Rise to EOLC Fall Delay
tEOLCD
Figure 8
20
ns
CONVST Fall to EOLC Rise Delay
tCVEOLCD Figures 7, 8, 9
20
ns
Internal clock, Figure 7
50
ns
EOC Pulse Width
tEOC
External clock, Figure 8
1
CLK
Cycle
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = +5V, VDVDD = +3V, VAGND = VDGND = 0V, VREF = VREFMS = +2.5V (external reference), CREF = CREFMS = 0.1F, CREF+ =
CREF- = 0.1F, CREF+-to-REF- = 2.2F || 0.1F, CCOM = 2.2F || 0.1F, CMSV = 2.2F || 0.1F (unipolar devices), MSV = AGND (bipo-
lar devices), fCLK = 16.67MHz 50% duty cycle, INTCLK/EXTCLK = AGND (external clock), SHDN = DGND, TA = TMIN to TMAX,
unless otherwise noted. Typical values are at TA = +25°C. See Figures 3 and 4.)
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MAX1313ECM+T 功能描述:模数转换器 - ADC 12-Bit 4Ch 1.075Msps 3V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32
MAX1313ECM-T 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32
MAX1314ECM 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32