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参数资料
| 型号： | MAX13204EALT+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 6/9页 |
| 文件大小： | 0K |
| 描述： | IC ESD PROTECTOR 4CH 6UDFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 1 |
| 电极标记： | 4 通道阵列 - 双向 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-WDFN |
| 供应商设备封装： | 6-µDFN（2x2） |
| 包装： | 标准包装 |
| 其它名称： | MAX13204EALT+TDKR |
2-/4-/6-/8-Channel, ±30kV ESD Protectors in μDFN
Layout Recommendations
R C
50 ? to 100 ?
CHARGE-CURRENT-
LIMIT RESISTOR
R D
330 ?
DISCHARGE
RESISTANCE
Proper circuit-board layout is critical to suppress ESD-
induced line transients. The MAX13202E/MAX13204E/
MAX13206E/MAX13208E clamp to ±120V; however, with
improper layout, the voltage spike at the device is much
higher. A lead inductance of 10nH with a 45A current
spike at a dv/dt of 1ns results in an ADDITIONAL 450V
HIGH-
VOLTAGE
DC
Cs
150pF
STORAGE
CAPACITOR
DEVICE
UNDER
TEST
spike on the protected line. It is essential that the layout
of the PC board follows these guidelines:
SOURCE
Figure 6. IEC 61000-4-2 ESD Test Model
Human Body Model
Figure 4 shows the Human Body Model, and Figure 5
shows the current waveform it generates when dis-
charged into a low impedance. This model consists of
a 100pF capacitor charged to the ESD voltage of inter-
est, which is then discharged into the device through a
1.5k ? resistor.
IEC 61000-4-2
The IEC 61000-4-2 standard covers ESD testing and
performance of finished equipment. The MAX13202E/
MAX13204E/MAX13206E/MAX13208E help users
design equipment that meets Level 4 of IEC 61000-4-2.
The main difference between tests done using the
Human Body Model and IEC 61000-4-2 is higher peak
current in IEC 61000-4-2. Because series resistance is
lower in the IEC 61000-4-2 ESD test model (Figure 6),
the ESD-withstand voltage measured to this standard is
generally lower than that measured using the Human
Body Model. Figure 3 shows the current waveform for
the ±8kV IEC 61000-4-2 Level 4 ESD Contact
Discharge test.
The Air-Gap Discharge test involves approaching the
device with a charged probe. The Contact Discharge
method connects the probe to the device before the
probe is energized.
1) Minimize trace length between the connector or
input terminal, I/O_, and the protected signal line.
2) Use separate planes for power and ground to reduce
parasitic inductance and to reduce the impedance to
the power rails for shunted ESD current.
3) Ensure short ESD transient return paths to GND
and V CC .
4) Minimize conductive power and ground loops.
5) Do not place critical signals near the edge of the
PC board.
6) Bypass V CC to GND with a low-ESR ceramic capaci-
tor as close to V CC and ground terminals as possible.
7) Bypass the supply of the protected device to GND
with a low-ESR ceramic capacitor as close to the
supply pin as possible.
Chip Information
PROCESS: BiCMOS
6
_______________________________________________________________________________________
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX13204EELT+ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| MAX13204EELT+T | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| MAX13206EALA | 制造商:Maxim Integrated Products 功能描述:LOW-CAPACITANCE 4-/6-/8-CHANNEL + - Rail/Tube |
| MAX13206EALA+ | 制造商:Maxim Integrated Products 功能描述:ESD PROTECTORS 8PIN UDFN - Rail/Tube |
| MAX13206EALA+T | 功能描述:TVS二极管阵列 6Ch ESD Protection Diode Array RoHS:否 制造商:Littelfuse 极性: 通道:4 Channels 击穿电压: 钳位电压:11.5 V 工作电压:2.5 V 峰值浪涌电流:20 A 安装风格:SMD/SMT 端接类型:SMD/SMT 系列: 最小工作温度:- 40 C 最大工作温度:+ 85 C |
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