参数资料
型号: MAX13362ATL/V+T
厂商: Maxim Integrated Products
文件页数: 10/14页
文件大小: 0K
描述: IC SWITCH 1X2 40TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
系列: 4000
24-Channel Automotive Switch Monitor
Serial Peripheral Interface
( CS , SDO, SDI, CLK)
The MAX13362 operates as a serial peripheral interface
(SPI) slave device. An SPI master accesses and pro-
grams the MAX13362 by reading/writing the control
registers. The control registers are 32 bits wide, have 2
command bits (or register addresses) and 30 data bits
(see Table 1). Figure 3 shows the read/write sequence
through SPI. The SPI logic counts the number of bits
clocked into the IC (using a modulo-32 counter so that
CS
CLK
daisy chaining is possible) and enables data latching
only if exactly 32 bits (or an integer multiple thereof)
have been clocked in.
Status Register
The status register contains the status of the switches
connected to IN0–IN23. The status register also con-
tains an overtemperature warning bit, a power-on-reset
bit and a device type bit (see Table 1). The status reg-
ister is accessed by the SPI-compatible interface.
SDI
CB0 CB1 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29
SDO
Z DT RST T
S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S16 S17 S18 S19 S20 S21 S22 S23 x
x
x
x
x
Z
NOTE: X = UNUSED, Z = HIGH IMPEDANCE.
Figure 3. SPI Read/Write Sequence
Table 1. Bit Description
BIT NAME
CB0, CB1
D0–D29
S0–S23
T
RST
DT
BIT DESCRIPTION
Command bits. Select the internal register to which data bits D0–D29 are to be written.
Data bits.
Switch state bit. 0 = switch open, 1 = switch closed.
Overtemperature bit. When overtemperature occurs, this bit is set to 1. It is reset on the rising edge of CS .
Power-on-reset bit. It indicates whether the IC has had a power-on-reset since the last SPI read. 0 = device has
been reset. RST is set to 1 on the rising edge of CS .
Device type. 0 = reserved for future use, 1 = MAX13362.
10
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