参数资料
型号: MAX1342BETX+T
厂商: Maxim Integrated Products
文件页数: 22/39页
文件大小: 0K
描述: IC ADC/DAC 12BIT W/FIFO 36WQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: ADC,DAC
分辨率(位): 12 b
采样率(每秒): 225k
数据接口: MICROWIRE?,QSPI?,串行,SPI?
电压电源: 模拟和数字
电源电压: 4.75 V ~ 5.25 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 36-WFQFN 裸露焊盘
供应商设备封装: 36-TQFN 裸露焊盘(6x6)
包装: 带卷 (TR)
MAX1340/MAX1342/MAX1346/MAX1348
12-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
______________________________________________________________________________________
29
Partial Reads and Partial Writes
If the first byte of an entry in the FIFO is partially read
(
CS is pulled high after fewer than eight SCLK cycles),
the remaining bits are lost for that byte. The next byte of
data that is read out contains the next 8 bits. If the first
byte of an entry in the FIFO is read out fully, but the
second byte is read out partially, the rest of that byte is
lost. The remaining data in the FIFO is unaffected and
can be read out normally after taking
CS low again, as
long as the 4 leading bits (normally zeros) are ignored.
If
CS is pulled low before EOC goes low, a conversion
may not be completed and the FIFO data may not be
correct. Incorrect writes (pulling
CS high before com-
pleting eight SCLK cycles) are ignored and the register
remains unchanged.
Applications Information
Internally Timed Acquisitions and
Conversions Using
CNVST
ADC Conversions in Clock Mode 00
In clock mode 00, the wake-up, acquisition, conversion,
and shutdown sequence is initiated through
CNVST
and performed automatically using the internal oscilla-
tor. Results are added to the internal FIFO to be read
out later. See Figure 6 for clock mode 00 timing after a
command byte is issued. See Table 5 for details on
programming the clock mode in the setup register.
Initiate a scan by setting
CNVST low for at least 40ns
before pulling it high again. The MAX1340/MAX1342/
MAX1346/MAX1348 then wake up, scan all requested
channels, store the results in the FIFO, and shut down.
After the scan is complete,
EOC is pulled low and the
results are available in the FIFO. Wait until
EOC goes
low before pulling
CS low to communicate with the seri-
al interface.
EOC stays low until CS or CNVST is pulled
low again. A temperature-conversion result, if request-
ed, precedes all other FIFO results.
FULL-SCALE
TRANSITION
111....111
0
INPUT VOLTAGE (LSB)
FS = VREF
111....110
111....101
OFFSET
BINAR
Y
OUTPUT
CODE
(LSB)
000....011
000....010
000....001
000....000
2
13
FS
1 LSB = VREF / 4096
FS - 3/2 LSB
Figure 3. Unipolar Transfer Function—Full Scale (FS) = VREF
OUTPUT CODE
011....111
TEMPERATURE (°C)
011....110
000....001
111....101
100....001
100....000
111....111
111....110
000....000
0
000....010
-256
+255.5
Figure 5. Temperature Transfer Function
011....111
-FS
INPUT VOLTAGE (LSB)
FS = VREF / 2 + VCOM
VREF = VREF+ - VREF-
-FS = -VREF / 2
011....110
011....101
000....001
000....000
111....111
OFFSET
BINAR
Y
OUTPUT
CODE
(LSB)
100....011
100....010
100....001
100....000
0
(COM)
-1
+1
+FS - 1 LSB
1 LSB = VREF / 4096
ZS = COM
VREF
(COM)
VREF
Figure 4. Bipolar Transfer Function—Full Scale (±FS) = ±VREF / 2
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