参数资料
型号: MAX1361EUB+T
厂商: Maxim Integrated Products
文件页数: 21/24页
文件大小: 0K
描述: IC SYSTEM MON 10BIT 4CH 10-UMAX
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
位数: 10
采样率(每秒): 150k
数据接口: I²C,串行
转换器数目: 1
功率耗散(最大): 2mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
供应商设备封装: 10-µMAX
包装: 带卷 (TR)
输入数目和类型: 4 个单端,单极;4 个单端,双极;2 个差分,单极;2 个差分,双极
Typical Operating Characteristics
(VDD = 3.3V (MAX1361), VDD = 5V (MAX1362), fSCL = 1.7MHz, external clock, fSAMPLE = 94.4ksps, single-ended, unipolar,
TA = +25°C, unless otherwise noted.)
MAX1361/MAX1362
4-Channel, 10-Bit, System Monitor with Programmable
Trip Window and SMBus Alert Response
6
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 2.7V to 3.6V (MAX1361), VDD = 4.5V to 5.5V (MAX1362), VREF = 2.048V (MAX1361), VREF = 4.096V (MAX1362), CREF =
0.1F, fSCL = 1.7MHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
Note 1:
Devices configured for unipolar single-ended inputs.
Note 2:
Relative accuracy is the deviation of the analog value at any code from its theoretical value after the gain and offset have
been calibrated.
Note 3:
Offset nulled.
Note 4:
Conversion time is defined as the number of clock cycles needed for conversion multiplied by the clock period.
Conversion time does not include acquisition time. SCL is the conversion clock in the external clock mode.
Note 5:
The throughput rate of the I
2C bus is limited to 94.4ksps. The MAX1361/MAX1362 can perform conversions up to 150ksps
in monitor mode when not reading back results on the I
2C bus.
Note 6:
A filter on the SDA and SCL inputs suppresses noise spikes and delays the sampling instant.
Note 7:
The absolute input voltage range for the analog inputs (AIN0–AIN3) is from GND to VDD.
Note 8:
When the internal reference is configured to be available at AIN3/REF (SEL[2:1] = 11), decouple AIN3/REF to GND with a
0.01F capacitor.
Note 9:
ADC performance is limited by the converter’s noise floor, typically 300VP-P.
Note 10: Maximum conversion throughput in internal clock mode when the data is not clocked out.
Note 11: For the MAX1361, PSRR is measured as
and for the MAX1362, PSRR is measured as
Note 12: CB = total capacitance of one bus line in pF.
Note 13: fSCLH must meet the minimum clock low time plus the rise/fall times.
Note 14: A master device must provide a data hold time for SDA (referred to VIL of SCL) to bridge the undefined region of SCL’s
falling edge.
VV
V
FS
N
REF
(.
)
( .
)
(.
55
45
21
5
×
5
54 5
VV
.)
VV
V
FS
N
REF
(.
)
( .
)
(.
36
27
21
3
×
6
62 7
VV
.)
-160
-140
-120
-100
-80
-60
-40
-20
0
1020304050
FFT PLOT
MAX1361
toc03
FREQUENCY (kHz)
AMPLITUDE
(dBc)
fSAMPLE = 94.4ksps
fIN = 10kHz
-0.3
-0.1
-0.2
0.1
0
0.2
0.3
0
1000
DIFFERENTIAL NONLINEARITY
vs. DIGITAL CODE
MAX1361
toc01
DIGITAL OUTPUT CODE
DNL
(LSB)
400
200
600
800
-0.5
-0.2
-0.3
-0.4
-0.1
0
0.1
0.2
0.3
0.4
0.5
0
400
200
600
800
1000
INTEGRAL NONLINEARITY
vs. DIGITAL CODE
MAX1361
toc02
DIGITAL OUTPUT CODE
INL
(LSB)
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MAX1361LEUB+T 制造商:Maxim Integrated Products 功能描述:ADC SGL SAR 150KSPS 10-BIT SERL 10PIN UMAX - Tape and Reel
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MAX1361MEUB+T 功能描述:模数转换器 - ADC 10-Bit 4Ch 150ksps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32
MAX1361MEUB-T 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32