- 您现在的位置：买卖IC网 > PDF目录9898 > MAX144BCUA+ (Maxim Integrated Products)IC ADC 12BIT 108KSPS 8-UMAX PDF资料下载
参数资料
| 型号： | MAX144BCUA+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 14/16页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 108KSPS 8-UMAX |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 50 |
| 位数： | 12 |
| 采样率（每秒）： | 108k |
| 数据接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 330mW |
| 电压电源： | 单电源 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-TSSOP，8-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 8-uMAX |
| 包装： | 管件 |
| 输入数目和类型： | 2 个单端，单极 |
_______________Detailed Description
The MAX144/MAX145 analog-to-digital converters
(ADCs) use a successive-approximation conversion
(SAR) technique and on-chip track-and-hold (T/H)
structure to convert an analog signal to a serial 12-bit
digital output data stream.
This flexible serial interface provides easy interface to
microprocessors (Ps). Figure 2 shows a simplified
functional diagram of the internal architecture for both
the MAX144 (2 channels, single-ended) and the MAX145
(1 channel, pseudo-differential).
Analog Inputs: Single-Ended (MAX144)
and Pseudo-Differential (MAX145)
The sampling architecture of the ADC’s analog com-
parator is illustrated in the equivalent input circuit of
Figure 3. In single-ended mode (MAX144), both chan-
nels CH0 and CH1 are referred to GND and can be
connected to two different signal sources. Following the
power-on reset, the ADC is set to convert CH0. After
CH0 has been converted, CH1 will be converted and
the conversions will continue to alternate between
channels. Channel switching is performed by toggling
the CS/SHDN pin. Conversions can be performed on
the same channel by toggling CS/SHDN twice between
conversions. If only one channel is required, CH0 and
CH1 may be connected together; however, the output
data will still contain the channel identification bit
(before the MSB).
For the MAX145, the input channels form a single differ-
ential channel pair (CH+, CH-). This configuration is
pseudo-differential to the effect that only the signal at
IN+ is sampled. The return side IN- must remain stable
within ±0.5LSB (±0.1LSB for optimum results) with
respect to GND during a conversion. To accomplish
this, connect a 0.1F capacitor from IN- to GND.
During the acquisition interval, the channel selected as
the positive input (IN+) charges capacitor CHOLD. The
acquisition interval spans from when CS/SHDN falls to
the falling edge of the second clock cycle (external
clock mode) or from when CS/SHDN falls to the first
falling edge of SCLK (internal clock mode). At the end
of the acquisition interval, the T/H switch opens, retain-
ing charge on CHOLD as a sample of the signal at IN+.
The conversion interval begins with the input multiplex-
er switching CHOLD from the positive input (IN+) to the
negative input (IN-). This unbalances node ZERO at the
comparator’s positive input.
MAX144/MAX145
+2.7V, Low-Power, 2-Channel, 108ksps,
Serial 12-Bit ADCs in 8-Pin MAX
_______________________________________________________________________________________
7
6k
CL
DOUT
a) HIGH-Z TO V0H, V0L TO V0H, AND VOH TO HIGH-Z
6k
CL
DOUT
GND
VDD
b) HIGH-Z TO V0L, V0H TO V0L, AND VOL TO HIGH-Z
Figure 1. Load Circuits for Enable and Disable Time
MAX144
MAX145
12-BIT
SAR
ADC
SCLK
( ) ARE FOR MAX145
IN
OUT
ANALOG
INPUT
MUX
(2 CHANNEL)
CH0
(CH+)
CH1
(CH-)
REF
T/H
CONTROL
LOGIC
SCLK
CS/SHDN
INTERNAL
CLOCK
OUTPUT
REGISTER
DOUT
Figure 2. Simplified Functional Diagram
CH0
(CH+)
CH1
(CH-)
( ) ARE FOR MAX145
SINGLE-ENDED MODE: CH0, CH1 = IN+; GND = IN-
DIFFERENTIAL-ENDED MODE: CH+ = IN+; CH- = IN-
RIN
9k
ZERO
REF
GND
TRACK
HOLD
COMPARATOR
TO SAR
T/H
CHOLD
16pF
INPUT
MUX
12-BIT CAPACITIVE DAC
CSWITCH
CONTROL LOGIC
MAX144
MAX145
Figure 3. Analog Input Channel Structure
相关PDF资料 |
PDF描述 |
|---|---|
| VE-2WD-MX-F3 | CONVERTER MOD DC/DC 85V 75W |
| ISL32175EIBZ | IC RCVR RS485/422 QD ESD 16SOIC |
| ISL32175EFVZ | IC RCVR RS485/422 QD ESD 16TSSOP |
| IDT72V36110L7-5BB8 | IC FIFO 131KX36 7-5NS 144BGA |
| IDT72V2113L10PF8 | IC FIFO SUPERSYNCII 10NS 80-TQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX144BCUA+ | 功能描述:模数转换器 - ADC 12-Bit 2Ch 108ksps 5.25V High Speed ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX144BCUA+T | 功能描述:模数转换器 - ADC 12-Bit 2Ch 108ksps 5.25V High Speed ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX144BCUA-T | 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX144BEPA | 功能描述:模数转换器 - ADC Integrated Circuits (ICs) RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX144BEPA+ | 功能描述:模数转换器 - ADC 12-Bit 2Ch 108ksps 5.25V High Speed ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
发布紧急采购，3分钟左右您将得到回复。