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参数资料
| 型号： | MAX14525ETA+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 2/7页 |
| 文件大小： | 0K |
| 描述： | IC BATTERY SWITCH 4INPUTS 8TDFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 功能： | 电源管理 |
| 电池化学： | 锂离子（Li-Ion） |
| 电源电压： | 2.2 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-WFDFN 裸露焊盘 |
| 供应商设备封装： | 8-TDFN-EP（2x2） |
| 包装： | 带卷 (TR) |
Battery Switch with Four Enable Inputs
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND.)
IN, BAT, JIG, S_EN, ON_K ................................... -0.3V to +6.0V
TA ...........................................................................-0.3V to +28V
Continuous Power Dissipation (T A = +70°C)
8-Pin TDFN (derate 11.9 mW/°C above +70°C) .........954 mW
Junction-to-Case Thermal Resistance
( θ JC ) (Note 1) ...............................................................37°C/W
Junction-to-Ambient Thermal Resistance
( θ JA ) (Note 1) ...............................................................84°C/W
Operating Temperature Range .......................... -40°C to +85°C
Junction Temperature ..................................................... +150°C
Storage Temperature Range ............................ -65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial .
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V BAT = +2.2V to +5.5V, T A = -40°C to +85°C, unless otherwise noted. Typical values are at V BAT = +3.6V and T A = +25°C.)
(Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS
Input Voltage Range
V BAT , V IN
2.2
5.5
V
On-Resistance
Disable Supply Current
V BAT Supply Current
R ON
I BAT_DIS
I BAT
I LOAD = 100mA, V BAT = +3.0V
V BAT = +5.5V
(V JIG = V S_EN = V ON_K = V TA = V IN = 0)
V JIG = V S_EN = V BAT , V ON_K = V TA = 0
35
0.8
90
1
4.5
m Ω
μA
μA
Increase in Supply Current with
V JIG /V S_EN Voltage
Increase in Supply Current with
V ON_K Voltage
Peak Current
UVLO Undervoltage Lockout
Δ I BAT
Δ I BAT
I LIM
V JIG = V S_EN = V IH or V IL
V BAT = V ON_K = +3.6V
V BAT = +3.6V
Ramping V BAT
5
2
4.5
1.9
μA
μA
A
V
LOGIC INPUT
TA Threshold Voltage
V TA_TH
1.15
1.7
2.5
V
TA Threshold Hysteresis
1%
TA Input Resistance
V TA = 1V
50
100
180
k Ω
JIG, S_EN Input Logic-High
JIG, S_EN Input Logic-Low
V IH
V IL
1.4
0.4
V
V
JIG, S_EN Input Leakage Current
IN AND Gate Threshold Voltage
I IN
V IN_TH
V BAT = +5.5V
-200
0.3 x
V BAT
+200
0.6 x
V BAT
nA
V
ON_K Threshold Voltage
V ON_K_TH
Low-to-high transition
(Figure 1)
2.94
3.0
3.06
V
ON_K Threshold Hysteresis
1%
2
_______________________________________________________________________________________
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