参数资料
型号: MAX1470EUI+T
厂商: Maxim Integrated
文件页数: 8/12页
文件大小: 0K
描述: IC RECEIVER 315MHZ 28-TSSOP
其它有关文件: Automotive Product Guide
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
频率: 315MHz
灵敏度: -115dBm
调制或协议: ASK
应用: ISM,车库门开启器,RKE
电流 - 接收: 5.5mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 28-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 28-TSSOP
包装: 带卷 (TR)
315MHz Low-Power, +3V Superheterodyne
Receiver
When the crystal is loaded as specified, i.e., C load =
C spec , the frequency pulling equals zero.
Data Filter
The data filter is implemented as a 2nd-order lowpass
Sallen-Key filter. The pole locations are set by the combi-
nation of two on-chip resistors and two external capaci-
tors. Adjusting the value of the external capacitors
changes the corner frequency to optimize for different
MAX1470
R DF2 100k ?
RSSI
R DF1 100k ?
data rates. The corner frequency should be set to
approximately 1.5 times the fastest expected data rate
from the transmitter. Keeping the corner frequency near
19
DSP
21
OPP
C6
22
DF
C5
the data rate rejects any noise at higher frequencies,
resulting in an increase in receiver sensitivity.
The configuration shown in Figure 1 can create a
Butterworth or Bessel response. The Butterworth filter
offers a very flat amplitude response in the passband
and a roll-off rate of 40dB/decade for the two-pole filter.
The Bessel filter has a linear phase response, which
works well for filtering digital data. To calculate the
value of C5 and C6, use the following equations along
with the coefficients in Table 1:
Figure 1. Sallen-Key Lowpass Data Filter
Choosing standard capacitor values changes C5 to
470pF and C6 to 220pF, as shown in the Typical
Application Circuit.
Data Slicer
( )( )( )
( )( )( )
C 5 =
C 6 =
b
a 100 k ? π f c
a
4 100 k ? π f c
The purpose of the data slicer is to take the analog out-
put of the data filter and convert it to a digital signal.
This is achieved by using a comparator and comparing
the analog input to a threshold voltage. The threshold
voltage is set by the voltage on DSN, which is connect-
ed to the negative input of the data slicer comparator.
The positive input is connected to the output of the data
filter internally, and also the DSP pin for use with some
where f C is the desired 3dB corner frequency.
For example, to choose a Butterworth filter response
with a corner frequency of 5kHz:
data slicer configurations.
The suggested data slicer configuration uses a resistor
(R1) connected between DSN and DSP with a capaci-
tor (C4) from DSN to DGND (Figure 2). This configura-
≈ 450 pF
≈ 225 pF
( )( )( )( )
C 5 =
C 6 =
1 . 000
( 1 . 414 )( 100 k ? )( 3 . 14 )( 5 kHz )
1 . 414
4 100 k ? 3 . 14 5 kHz
tion averages the analog output of the filter and sets the
threshold to approximately 50% of that amplitude. With
this configuration, the threshold automatically adjusts
as the analog signal varies, minimizing the possibility
for errors in the digital data. The sizes of R1 and C4
affect how fast the threshold tracks the analog ampli-
tude. Be sure to keep the corner frequency of the RC
circuit lower than the lowest expected data rate.
Table 1. Coefficents to Calculate C5 and C6
Note that a long string of zeros or ones can cause the
threshold to drift. This configuration works best if a cod-
FILTER TYPE
Butterworth
(Q = 0.707)
Bessel
(Q = 0.577)
a
1.414
1.3617
b
1.000
0.618
ing scheme, such as Manchester code, which has an
equal number of zeros and ones, is used.
Peak Detector
The peak detector output (PDOUT), in conjunction with
an external RC filter, creates a DC output voltage equal
to the peak value of the data signal. The resistor pro-
vides a path for the capacitor to discharge, allowing the
8
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