参数资料
型号: MAX147AEPP+
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: ADC
英文描述: +2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs
中文描述: 8-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP20
封装: 0.300 INCH, PLASTIC, DIP-20
文件页数: 24/28页
文件大小: 746K
代理商: MAX147AEPP+
MAX146/MAX147
+2.7V, Low-Power, 8-Channel,
Serial 12-Bit ADCs
_______________________________________________________________________________________
5
Figure 1
Typical Operating Characteristics
(VDD = 3.0V, VREF = 2.5V, fSCLK = 2.0MHz, CLOAD = 20pF, TA = +25°C, unless otherwise noted.)
0.5
0
1024
2048
3072
4096
INTEGRAL NONLINEARITY
vs. CODE
0.3
-0.3
-0.5
-0.1
0.1
0.4
0.2
-0.4
-0.2
0
MAX146/47-01
CODE
INL
(LSB)
0.50
0
2.25
2.75
4.25
INTEGRAL NONLINEARITY
vs. SUPPLY VOLTAGE
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
VDD (V)
INL
(LSB)
3.75
5.25
3.25
4.75
MAX146/47-02
MAX146
MAX147
0
0.10
0.20
0.30
0.40
0.50
0.05
0.15
0.25
0.35
0.45
-60
-20
20
60
100
140
INTEGRAL NONLINEARITY
vs. TEMPERATURE
TEMPERATURE (°C)
INL
(LSB)
MAX146/47-03
MAX147
MAX146
VDD = 2.7V
TIMING CHARACTERISTICS
(VDD = +2.7V to +3.6V (MAX146); VDD = +2.7V to +5.25V (MAX147); TA = TMIN to TMAX; unless otherwise noted.)
Note 1: Tested at VDD = 2.7V; COM = 0; unipolar single-ended input mode.
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has
been calibrated.
Note 3: MAX146—internal reference, offset nulled; MAX147—external reference (VREF = +2.5V), offset nulled.
Note 4: Ground “on” channel; sine wave applied to all “off” channels.
Note 5: Conversion time defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
Note 6: The common-mode range for the analog inputs is from AGND to VDD.
Note 7: External load should not change during conversion for specified accuracy.
Note 8: ADC performance is limited by the converter’s noise floor, typically 300Vp-p.
Note 9: Guaranteed by design. Not subject to production testing.
Note 10: Measured as
|VFS(2.7V) - VFS(VDD, MAX)|.
Internal clock mode only (Note 9)
External clock mode only, Figure 2
External clock mode only, Figure 1
DIN to SCLK Setup
Figure 1
Figure 2
Figure 1
MAX14_ _C/E
CONDITIONS
MAX14_ _M
ns
20
240
Figure 1
ns
tCSH
ns
240
tSTR
CS Rise to SSTRB Output Disable
ns
240
tSDV
CS Fall to SSTRB Output Enable
240
tSSTRB
SCLK Fall to SSTRB
ns
200
tCL
SCLK Pulse Width Low
ns
200
SCLK Pulse Width High
ns
0
CS to SCLK Rise Hold
ns
100
tCSS
CS to SCLK Rise Setup
ns
240
tTR
CS Rise to Output Disable
ns
240
tDV
CS Fall to Output Enable
tCH
20
200
tDO
SCLK Fall to Output Data Valid
ns
0
tDH
DIN to SCLK Hold
ns
s
1.5
tACQ
Acquisition Time
0
tSCK
SSTRB Rise to SCLK Rise
ns
100
tDS
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
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MAX147BCAP 功能描述:模数转换器 - ADC Integrated Circuits (ICs) RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32
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