参数资料
型号: MAX147CEAP+
厂商: Maxim Integrated Products
文件页数: 3/24页
文件大小: 0K
描述: IC ADC 12BIT SERIAL 20-SSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 66
位数: 12
采样率(每秒): 133k
数据接口: MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
功率耗散(最大): 640mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-SSOP(0.209",5.30mm 宽)
供应商设备封装: 20-SSOP
包装: 管件
输入数目和类型: 8 个单端,单极;8 个单端,双极;4 个差分,单极;4 个差分,双极
MAX146/MAX147
+2.7V, Low-Power, 8-Channel,
Serial 12-Bit ADCs
______________________________________________________________________________________
11
BIT
NAME
DESCRIPTION
7(MSB)
START
The first logic “1” bit after CS goes low defines the beginning of the control byte.
6
SEL2
These three bits select which of the eight channels are used for the conversion (Tables 2 and 3).
5
SEL1
4
SEL0
3
UNI/BIP
1 = unipolar, 0 = bipolar. Selects unipolar or bipolar conversion mode. In unipolar mode, an
analog input signal from 0V to VREF can be converted; in bipolar mode, the signal can range
from -VREF/2 to +VREF/2.
2
SGL/DIF
1 = single ended, 0 = differential. Selects single-ended or differential conversions. In single-
ended mode, input signal voltages are referred to COM. In differential mode, the voltage
difference between two channels is measured (Tables 2 and 3).
1
PD1
Selects clock and power-down modes.
0(LSB)
PD0
PD1
PD0
Mode
0
Full power-down
0
1
Fast power-down (MAX146 only)
1
0
Internal clock mode
1
External clock mode
Table 1. Control-Byte Format
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
(MSB)
(LSB)
START
SEL2
SEL1
SEL0
UNI/BIP
SGL/DIF
PD1
PD0
Table 2. Channel Selection in Single-Ended Mode (SGL/DIF = 1)
SEL2
SEL1
SEL0
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
00
0
+
10
0
+
00
1
+–
10
1
+–
01
0
+–
11
0
+–
01
1
+–
11
1
+
Table 3. Channel Selection in Differential Mode (SGL/DIF = 0)
SEL2
SEL1
SEL0
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
00
0
+–
00
1
+–
01
0
+–
01
1
+–
10
0
–+
10
1
–+
11
0
–+
11
1
–+
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