参数资料
型号: MAX15001AEUB+T
厂商: Maxim Integrated Products
文件页数: 10/18页
文件大小: 0K
描述: IC REG CTRLR PWM CM 10-UMAX
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 2.5MHz
占空比: 50%
电源电压: 9.5 V ~ 24 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
包装: 带卷 (TR)
Current-Mode PWM Controllers with
Programmable Switching Frequency
threshold), then startup has been accomplished and
sustained operation will commence. If V IN drops below
9.74V before startup is complete, the device goes back
to low-current UVLO. In this case, increase the value of
C1 to store enough energy to allow for the voltage at
the tertiary winding to build up.
UVLO Flag (UFLG)
The MAX15000/MAX15001 have an open-drain under-
voltage flag output (UFLG). When used with an opto-
coupler the UFLG output can serve to sequence a
secondary-side controller. An internal 210μs delay
occurs the instant the voltage on UVLO/EN drops
below 1.17V until NDRV stops switching. This allows for
the UFLG output to change state before the MAX15000/
MAX15001 shut down ( Figure 3).
When the voltage at the UVLO/EN is above the thresh-
old, UFLG is high impedance. When UVLO/EN is below
the threshold, UFLG goes low. UFLG is not affected by
bootstrap UVLO (MAX15000).
MAX15000 fig02
Soft-Start
100ms/div
V CC
2V/div
V IN
5V/div
0V
The MAX15000/MAX15001 soft-start feature allows the
output voltage to ramp up in a controlled manner, elimi-
nating voltage overshoot. The MAX15000/MAX15001
reference generator that is internally connected to the
error amplifier soft-starts to achieve superior control of
the output voltage under heavy and light load condi-
tions. Soft-start begins after UVLO is deasserted (V IN is
above 21.6V for the MAX15000, V IN is above 9.5V for
the MAX15001, and the voltage on UVLO/EN is above
1.23V). The voltage applied to the noninverting node of
the amplifier ramps from 0 to 1.23V in 1984 NDRV
switching cycles. Use the following formula to calculate
the soft-start time (t SS ):
Figure 2. VIN and VCC During Startup When Using the
MAX15000 in Bootstrapped Mode (Figure 1)
t SS =
1984
f NDRV
where f NDRV is the switching frequency at the NDRV
output. Figure 4 shows the soft-start regulated output of
a power supply using the MAX15000 during startup.
1.23V
V UVLO/EN
( ± 1%)
Hi-Z
1.17V (typ)
V UFLG
V NDRV
LOW
SHUTDOWN
3 μ s
0.6 μ s
NDRV SWITCHING
LOW
SHUTDOWN
t EXTF
t EXTR
3ms
Figure 3. UVLO/EN and UFLG Operation Timing
210 μ s
10
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