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参数资料
| 型号： | MAX15024DATB+T |
| 厂商： | Maxim Integrated |
| 文件页数： | 3/16页 |
| 文件大小： | 0K |
| 描述： | IC GATE DRVR 1CH 16NS 10TDFN-EP |
| 标准包装： | 2,500 |
| 配置： | 高端 |
| 输入类型： | 反相和非反相 |
| 延迟时间： | 16ns |
| 电流 - 峰： | 4A |
| 配置数： | 1 |
| 输出数： | 1 |
| 电源电压： | 6.5 V ~ 28 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-WFDFN 裸露焊盘 |
| 供应商设备封装： | 10-TDFN-EP（3x3） |
| 包装： | 带卷 (TR) |
MAX15024/MAX15025
Single/Dual, 16ns, High Sink/Source
Current Gate Drivers
MAX15024 ELECTRICAL CHARACTERISTICS (continued)
(V CC = V DRV = V REG = 10V, FB/SET = GND, T A = T J = -40°C to +125°C, unless otherwise noted. Typical values are at T A = T J =
+ 25°C). (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DRIVER OUTPUT (SINK)
V CC = V REG = V DRV = 10V,
sinking 100mA
T A = +25°C
T A = +125°C
0.45
0.625
0.60
0.850
Driver Output Resistance
R ON-N
V CC = V REG = V DRV = 4.5V, T A = +25°C
0.50
0.65
Ω
sinking 100mA
(MAX15024A)
T A = +125°C
0.7
0.9
Peak Output Current
Maximum Load Capacitance
Latchup Robustness
I PK-N
V N_OUT = 10V
SOA condition: C L x V DRV2 ≤ 20μJ,
for V DRV = 10V
8
200
500
A
nF
mA
DRIVER OUTPUT (SOURCE)
V CC = V REG = V DRV = 10V,
sourcing 100mA
T A = +25°C
T A = +125°C
0.875
1.2
1.500
2.0
Driver Output Resistance
R ON-P
V CC = V REG = V DRV = 4.5V, T A = +25°C
0.95
1.65
Ω
sourcing 100mA
(MAX15024A)
T A = +125°C
1.25
2.20
Peak Output Current
Latchup Robustness
I PK-P
V P_OUT = 0V
4
500
A
mA
LOGIC INPUTS
Logic 1 Input Voltage
Logic 0 Input Voltage
Logic Input Hysteresis
V IH
V IL
MAX15024A
MAX15024B
MAX15024A
MAX15024B
MAX15024A
MAX15024B
2.0
4.25
0.4
1
0.8
2
V
V
V
Logic Input Current Leakage
V IN = 18V or V GND
-75
0.01
+75
μA
Input Capacitance
10
pF
SWITCHING CHARACTERISTICS FOR V CC = V DRV = V REG = 10V, P_OUT AND N_OUT ARE CONNECTED TOGETHER
(see Figure 1)
C LOAD = 1nF
3
Rise Time
t R
C LOAD = 5nF
12
ns
C LOAD = 10nF
C LOAD = 1nF
24
3
Fall Time
t F
C LOAD = 5nF
8
ns
C LOAD = 10nF
16
Turn-On Delay Time
Turn-Off Delay Time
t D-ON
t D-OFF
C LOAD = 1nF (Note 3)
C LOAD = 1nF (Note 3)
8
8
16
16
32
32
ns
ns
Mismatch Propagation Delays
from Inverting and Noninverting
C LOAD = 1nF (Note 3)
-9
1
+9
ns
Inputs to Output
Maxim Integrated
3
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