参数资料
型号: MAX15039EVKIT+
厂商: Maxim Integrated Products
文件页数: 13/19页
文件大小: 0K
描述: EVALUATION KIT FOR MAX15039
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
主要目的: DC/DC,步降
输出及类型: 1,非隔离
输出电压: 0.6 ~ 4.5V
电流 - 输出: 6A
输入电压: 2.9 ~ 5.5 V
稳压器拓扑结构: 降压
板类型: 完全填充
已供物品:
已用 IC / 零件: MAX15039
6A, 2MHz Step-Down Regulator
with Integrated Switches
Power-Good Output (PWRGD)
PWRGD is an open-drain output that goes high imped-
ance when V FB is above 0.925 x V REFIN and V REFIN is
above 0.54V for at least 48 clock cycles. PWRGD pulls
low when V FB is below 90% of V REFIN or V REFIN is
Table 1. CTL1 and CTL2 Output Voltage
Selection
V OUT WHEN
USING
below 0.54V for at least 48 clock cycles. PWRGD is low
CTL1
CTL2
V OUT (V)
EXTERNAL
when the IC is in shutdown mode, V DD is below the
internal UVLO threshold, or the IC is in thermal shut-
REFIN
(V)
down mode.
0.6* or
V REFIN * or
Programming the Output Voltage
(CTL1, CTL2)
GND
GND
0.6 < V OUT ≤ V REFIN < V OUT ≤
0.9 x V IN **
0.9 x V IN **
As shown in Table 1, the output voltage is pin program-
mable by the logic states of CTL1 and CTL2. CTL1 and
CTL2 are trilevel inputs: V DD , unconnected, and GND.
An 8.06k Ω resistor must be connected between OUT
and FB when CTL1 and CTL2 are connected to GND.
The logic states of CTL1 and CTL2 should be pro-
grammed only before power-up. Once the part is
enabled, CTL1 and CTL2 should not be changed. If the
output voltage needs to be reprogrammed, cycle
power or EN and reprogram before enabling. The out-
V DD
GND
GND
Unconnected
Unconnected
Unconnected
V DD
V DD
V DD
Unconnected
V DD
GND
Unconnected
V DD
GND
Unconnected
0.7
0.8
1.0
1.2
1.5
1.8
2.0
2.5
V REFIN x (7/6)
V REFIN x (4/3)
V REFIN x (5/3)
V REFIN x 2
V REFIN x 2.5
V REFIN x 3
V REFIN x (10/3)
V REFIN x (25/6)
put voltage can be programmed continuously from
0.6V to 90% of V IN by using a resistor-divider network
from V OUT to FB to GND as shown in Figure 3a. CTL1
and CTL2 must be connected to GND.
*Install an 8.06k Ω resistor at R3 and do not install a resistor at R4.
**Install R3 and R4 following the equation in the Compensation
Design section (see Figure 3a).
Shutdown Mode
Drive EN to GND to shut down the IC and reduce quies-
LX
L
V OUT
cent current to 10μA (typ). During shutdown, the LX is
high impedance. Drive EN high to enable the MAX15039.
MAX15039
C OUT
R3
R2
Thermal Protection
Thermal-overload protection limits total power dissipation
in the device. When the junction temperature exceeds
T J = +165°C, a thermal sensor forces the device into
shutdown, allowing the die to cool. The thermal sensor
CTL1
CTL2
OUT
FB
COMP
R1
C2
C1
R4
C3
turns the device on again after the junction temperature
cools by 20°C, causing a pulsed output during continu-
a) EXTERNAL RESISTIVE DIVIDER
ous overload conditions. The soft-start sequence begins
after recovery from a thermal-shutdown condition.
Applications Information
IN and V DD Decoupling
MAX15039
LX
OUT
L
C OUT
V OUT
R2
To decrease the noise effects due to the high switching
frequency and maximize the output accuracy of
the MAX15039, decouple IN with a 22μF capacitor from
R3
8k Ω
C3
IN to PGND. Also, decouple V DD with a 2.2μF low-ESR
ceramic capacitor from V DD to GND. Place these
capacitors as close as possible to the IC.
VOLTAGE
SELECT
CTL1
CTL2
FB
COMP
R1
C2
C1
b) INTERNAL PRESET VOLTAGES
Figure 3. Type III Compensation Network
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