参数资料
型号: MAX15041ETE+
厂商: Maxim Integrated Products
文件页数: 12/18页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 3A 16TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 100
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.6 V ~ 25.2 V
输入电压: 4.5 V ~ 28 V
PWM 型: 电流模式
频率 - 开关: 350kHz
电流 - 输出: 3A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-WFQFN 裸露焊盘
包装: 托盘
供应商设备封装: 16-TQFN-EP(3x3)
Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM
Step-Down DC-DC Regulator with Internal Switches
Inductor Selection
For ceramic capacitors, ESR contribution is negligible:
A larger inductor value results in reduced inductor ripple
current, leading to a reduced output ripple voltage.
However, a larger inductor value results in either a larger
physical size or a higher series resistance (DCR) and a
R ESR _ COUT <<
1
8 × f SW × C OUT
lower saturation current rating. Typically, inductor value
is chosen to have current ripple equal to 30% of load
For tantalum or electrolytic capacitors, ESR contribution
is dominant:
× ? 1 ? OUT ?
L =
current. Choose the inductor with the following formula:
V OUT ? V ?
f SW × ? I L ? V IN ?
R ESR _ COUT >>
1
8 × f SW × C OUT
= I
+ × ? I < min( I
I L _ PK LOAD L HSCL _ MIN , I L _ SAT )
where f SW is the internally fixed 350kHz switching fre-
quency, and ? I L is the estimated inductor ripple current
(typically set to 0.3 x I LOAD ). In addition, the peak
inductor current, I L_PK, must always be below both the
minimum high-side MOSFET current-limit value,
I HSCL_MIN (5A, typ), and the inductor saturation current
rating, I L_SAT . Ensure that the following relationship is
satisfied:
1
2
Diode Selection
The MAX15041 requires an external bootstrap steering
diode. Connect the diode between V DD and BST. The
diode should have a reverse voltage rating, higher than
the converter input voltage and a 150mA minimum cur-
rent rating. Typically, a fast switching or Schottky diode
is used in this application, such as a 1N4148 diode.
Input Capacitor Selection
For a step-down converter, input capacitor C IN helps to
keep the DC input voltage steady, in spite of discontin-
uous input AC current. Low-ESR capacitors are pre-
ferred to minimize the voltage ripple due to ESR.
Size C IN using the following formula:
Compensation Design Guidelines
The MAX15041 uses a fixed-frequency, peak-current-
mode control scheme to provide easy compensation
and fast transient response. The inductor peak current is
monitored on a cycle-by-cycle basis and compared to
the COMP voltage (output of the voltage error amplifier).
The regulator’s duty-cycle is modulated based on the
inductor’s peak current value. This cycle-by-cycle con-
trol of the inductor current emulates a controlled current
source. As a result, the inductor’s pole frequency is
shifted beyond the gain-bandwidth of the regulator.
System stability is provided with the addition of a sim-
ple series capacitor-resistor from COMP to SGND. This
pole-zero combination serves to tailor the desired
response of the closed-loop system.
The basic regulator loop consists of a power modulator
(comprising the regulator ’s pulse-width modulator,
compensation ramp, control circuitry, MOSFETs, and
inductor), the capacitive output filter and load, an out-
put feedback divider, and a voltage-loop error amplifier
with its associated compensation circuitry. See Figure 1
for a graphical representation.
The average current through the inductor is expressed as:
I L = G MOD × V COMP
× OUT
C IN =
I LOAD
f SW × ? V IN _ RIPPLE
V
V IN
where I L is the average inductor current and G MOD is
the power modulator’s transconductance. For a buck
converter:
Output-Capacitor Selection
Low-ESR capacitors are recommended to minimize the
voltage ripple due to ESR. Total output-voltage peak-to-
peak ripple is estimated by the following formula:
V OUT = R LOAD × I L
where R LOAD is the equivalent load resistor value.
Combining the two previous equations, the power mod-
× ? 1 ? OUT ? × ? R ESR _ COUT +
= LOAD L = R LOAD MOD
× G
? ? G
MOD ?
? V OUT =
V OUT
f SW × L
? V IN ? ?
? V ? ?
1 ?
8 × f SW × C OUT ? ?
ulator’s transfer function in terms of V OUT with respect
to V COMP is:
V OUT R × I
V COMP ? I L ?
?
12
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