参数资料
| 型号： | MAX15103EWL+T |
| 厂商： | Maxim Integrated |
| 文件页数： | 2/10页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO ADJ 3A 15WLP |
| 标准包装： | 2,500 |
| 稳压器拓扑结构： | 正，可调式 |
| 输出电压： | 0.6 V ~ 5.2 V |
| 输入电压： | 1.7 V ~ 5.5 V |
| 电压 - 压降（标准）： | 0.065V @ 3A |
| 稳压器数量： | 1 |
| 电流 - 输出： | 3A |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 15-WFBGA, WLBGA |
| 供应商设备封装： | 15-WLP (2.65x1.57) |
| 包装： | 带卷 (TR) |
MAX15103
Small 3A, Low-Dropout Linear Regulator
in a 2.7mm x 1.6mm Package
ABSOLUTE MAXIMUM RATINGS
IN, EN, PG, SS_BYP, FB to GND ...........................-0.3V to +6V
OUT to GND ...............................................-0.3V to (V IN + 0.3V)
OUT Short Circuit ......................................................Continuous
Continuous Power Dissipation (T A = +70 N C)
WLP (derate 19.2mW/ N C above +70 N C) ....................1538mW
Operating Temperature Range ........................ -40 N C to +85 N C
Storage Temperature Range ......................... -65 N C to +150 N C
Junction Temperature ....................................................+150 N C
Soldering Temperature (reflow) (Note 1) ........................+260 N C
Note 1: The WLP package is constructed using a unique set of package techniques that impose a limit on the thermal profile. The
device can be exposed during board-level solder attach and rework. This limit permits only the use of the solder profiles
recommended in the industry-standard specification JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and convection
reflow. Preheating is required. Hand or wave soldering is not allowed.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 2)
WLP
Junction-to-Ambient Thermal Resistance ( q JA ) ..........30°C/W
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial .
ELECTRICAL CHARACTERISTICS
(V IN = 3.3V, V OUT = 1.5V, V EN = V IN , I OUT = 100mA, C IN = 2.2μF, C OUT = 22μF, T A = T J = -40 N C to +85 N C, typical values are at
T A = +25 N C, unless otherwise noted.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
IN
Input Voltage Range
V IN
1.7
5.5
V
Input Undervoltage Lockout
Input Undervoltage Lockout
Hysteresis
V IN_UV
V IN_UV_HYS
V IN rising
1.624
40
1.69
V
mV
OUT
Output Voltage Range
Load Regulation
V OUT
I OUT = 30mA to 3A
0.6
0.1
5.2
V
%/A
Line Regulation
Dropout Voltage
V IN = 1.7V to 5.5V, V OUT = 0.6V,
I OUT = 190mA
I OUT = 3A, V FB = 580mV (Note 4)
-0.15
65
+0.15
200
%/V
mV
In-Regulation Current Limit
Short-Circuit Foldback Current
Limit
Output Shutdown Leakage
Line Transient
V IN = 5.5V, V FB = 500mV
V IN = 5.5V, V OUT = 0V, V FB < 100mV
V IN = 5.5V, V OUT = 0V, V EN = 0V,
T A = -40 N C to +85 N C
D V IN = 0.5V, t RISE = t FALL = 5 F s
3.7
1.8
2
4
A
A
F A
%
2
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