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参数资料
| 型号： | MAX1510 |
| 厂商： | Maxim Integrated Products, Inc. |
| 英文描述： | Low-Voltage DDR Linear Regulator |
| 中文描述： | 低电压、DDR线性稳压器 |
| 文件页数： | 9/13页 |
| 文件大小： | 415K |
| 代理商： | MAX1510 |
M
Low-Voltage DDR Linear Regulator
_______________________________________________________________________________________
9
The MAX1510 features an open-drain PGOOD output
that transitions high 2ms after the output initially reach-
es regulation. PGOOD goes low within 10μs of when
the output goes out of regulation by
±
150mV. The
MAX1510 features current- and thermal-limiting circuitry
to prevent damage during fault conditions.
3.3V Bias Supply (V
CC
)
The V
CC
input powers the control circuitry and provides
the gate drive to the pass transistor. This improves effi-
ciency by allowing V
IN
to be powered from a lower sup-
ply voltage. Power V
CC
from a well-regulated 3.3V
supply. Current drawn from the V
CC
supply remains rel-
atively constant with variations in V
IN
and load current.
Bypass V
CC
with a 1μF or greater ceramic capacitor as
close to the device as possible.
V
CC
Undervoltage Lockout (UVLO)
The V
CC
input undervoltage-lockout (UVLO) circuitry
ensures that the regulator starts up with adequate volt-
age for the gate-drive circuitry to bias the internal pass
transistor. The UVLO threshold is 2.55V (typ). V
CC
must
remain above this level for proper operation.
Power Supply Input (IN)
IN provides the source current for the linear regulator
’
s
output, OUT. IN connects to the drain of the internal n-
channel power MOSFET. IN can be as low as 1.1V,
minimizing power dissipation. The input UVLO prohibits
operation below 0.8V (typ). Bypass IN with a 10μF or
greater capacitor as close to the device as possible.
Reference Input (REFIN)
The MAX1510 regulates OUTS to the voltage set at
REFIN, making the MAX1510 ideal for memory applica-
tions where the termination supply must track the sup-
ply voltage. Typically, REFIN is set by an external
resistive voltage-divider connected to the memory sup-
ply (V
DDQ
) as shown in Figure 1.
The maximum output voltage of 1.5V is limited by the
gate-drive voltage of the internal n-channel power
transistor.
Buffered Reference Output (REFOUT)
REFOUT is a unity-gain transconductance amplifier that
generates the DDR reference supply. It sources and
sinks greater than 5mA. The reference buffer is typically
connected to ceramic bypass capacitors (0.33μF to
1.0μF). REFOUT is active when V
REFIN
> 0.45V and
V
CC
is above V
UVLO
. REFOUT is independent of
SHDN
.
Shutdown
Drive
SHDN
low to disable the error amplifier, gate-
drive circuitry, and pass transistor (Figure 2). In shut-
down, OUT is terminated to GND with an 8
MOSFET.
REFOUT is independent of
SHDN
. Connect
SHDN
to
V
CC
for normal operation.
Current Limit
The MAX1510 features source and sink current limits to
protect the internal N-channel MOSFETs. The source
and sink MOSFETs have a typical 3A current limit (1.8A
min). This current limit prevents damage to the internal
power transistors, but the device can enter thermal
shutdown if the power dissipation increases the die
temperature above +165
°
C (see the
Thermal-Overload
Protection
section).
Soft-Start Current Limit
Soft-start gradually increases the internal source cur-
rent limit to reduce input surge currents at startup. Full-
source current limit is available after the 200μs soft-start
timer has expired. The soft-start current limit is
given by:
where I
LIMIT
and t
SS
are from the
Electrical
Characteristics.
Thermal-Overload Protection
Thermal-overload protection prevents the linear regula-
tor from overheating. When the junction temperature
exceeds +165
°
C, the linear regulator and reference
buffer are disabled, allowing the device to cool. Normal
operation resumes once the junction temperature cools
by 15
°
C. Continuous short-circuit conditions result in a
pulsed output until the overload is removed. A continu-
ous thermal-overload condition results in a pulsed out-
put. For continuous operation, do not exceed the
absolute maximum junction-temperature rating
of +150
°
C.
I
I
t
t
LIMIT SS
LIMIT
SS
(
)
×
=
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