参数资料
型号: MAX1515
厂商: Maxim Integrated Products, Inc.
英文描述: Low-Voltage, Internal Switch, Step-Down/DDR Regulator
中文描述: 低电压、内置开关、降压型/DDR稳压器
文件页数: 14/24页
文件大小: 504K
代理商: MAX1515
M
Low-Voltage, Internal Switch,
Step-Down/DDR Regulator
14
______________________________________________________________________________________
+3.3V Bias Supply (V
CC
and V
DD
)
The MAX1515 requires a 3.3V bias supply for its inter-
nal circuitry. Typically, this 3.3V bias supply is the note-
book’s 95%-efficient, 3.3V system supply. The 3.3V
bias supply must provide V
CC
(PWM controller) and
V
DD
(gate-drive and reference buffer power), so the
maximum current drawn is:
I
BIAS
= I
CC
+ I
REFOUT
+ f
SW
(Q
G(LOW)
+ Q
G(HIGH)
)
where I
CC
is 450μA (typ), f
SW
is the switching frequen-
cy, and Q
G(LOW)
and Q
G(HIGH)
are the internal MOS-
FET total gate charge of approximately 1nC.
The input supply (V
IN
) and 3.3V bias inputs (V
CC
and
V
DD
) can be connected together if the input source is a
fixed 3.0V to 3.6V supply. If the 3.3V bias supply pow-
ers up prior to the input supply, the enable signal
(
SHDN
going from low to high) must be delayed until
the input voltage is present to ensure startup.
Current Limit
The MAX1515 provides peak current limiting to protect
the MOSFETs during source/sink overload and short
circuit. During source mode the controller switches the
high-side MOSFET off when the inductor current
exceeds 4.2A. Use the following equation to calculate
the maximum source current:
where I
SOURCE_MAX
is the maximum source current,
I
LIMIT_P
is the source inductor current limit (4.2A typ),
and t
OFF
is the fixed off-time. For typical operating con-
ditions and component selection, this results in a maxi-
mum source current of 3.7A.
In sink mode, the MAX1515 does not issue an off-time
until the inductor current is above -3.2A. Use the follow-
ing equation to calculate the maximum sink current:
where I
SINK_MAX
is the maximum sink current, I
LIMIT_N
is the sink inductor current limit (-3.0A typ), t
DLY
is the
current-limit propagation delay of approximately 500ns,
and t
OFF
is the fixed off-time. For typical operating con-
ditions and component selection, this results in a maxi-
mum sink current of -2.5A.
Soft-Start Current Limit
Soft-start allows a gradual increase of the internal cur-
rent limit to reduce input surge currents at startup and at
exit from shutdown. A timing capacitor, C
SS
, placed
from SS to GND sets the rate at which the internal cur-
rent limit is changed. Upon power-up, when the device
comes out of undervoltage lockout (2.6V typ) or after the
SHDN
pin is pulled high, a 5μA (typ) constant-current
source charges the soft-start capacitor and the voltage
on SS increases. When the voltage on SS is less than
approximately 0.7V, the current limit is set to zero. As
the voltage increases from 0.7V to approximately 1.8V,
the current limit is adjusted from 0 to the current-limit
threshold (see the
Electrical Characteristics
). The volt-
age across the soft-start capacitor changes with time
according to the equation:
where I
SS(SRC)
is the soft-start source current from the
Electrical Characteristics
.
The time when full current limit is available is given by:
The soft-start current limit varies with the voltage on the
soft-start pin, SS, according to the equation:
where I
LIMIT_P
is the positive current threshold from the
Electrical Characteristics
. The constant-current source
stops charging once the voltage across the soft-start
capacitor reaches 1.8V (Figure 3).
Adjustable Positive Current Limit
The MAX1515 has internal current-limit circuitry that
limits the maximum current through the NMOS to 4.2A.
For applications that require a lower current limit, the
maximum current limit can be reduced by placing a
resistor (R
SS
) from SS to GND. The time constant for
the soft-start current limit is R
SS
x C
SS
.
where I
LIMIT
is the desired reduced current limit, and
I
LIMIT_P
and I
SS(SRC)
are taken from the
Electrical
Characteristics
.
R
V
I
I
V
I
SS
REF
LIMIT
_
LIMIT P
SS SRC
(
=
×
+
.
/
)
0 7
SSI
V
V
V
I
LIMIT
SS
REF
LIMIT P
=
×
0 7
_
t
C
V
I
SS
SS SRC
(
=
×
1 8
)
V
I
t
C
SS
SS SRC
(
SS
=
×
)
I
I
V
V
2
V
t
L
SINK MAX
_
LIMIT N
OUT OFF
IN
OUT
DLY
_
=
+
(
)
2
I
I
V
t
L
SOURCE MAX
LIMIT P
OUT
OFF
_
_
×
×
=
2
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