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参数资料
| 型号： | MAX1587CETL+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 21/30页 |
| 文件大小： | 0K |
| 描述： | IC POWER MANAGEMENT 40-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | 手持/移动设备 |
| 电源电压： | 2.6 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-WFQFN 裸露焊盘 |
| 供应商设备封装： | 40-TQFN-EP（6x6） |
| 包装： | 带卷 (TR) |
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High-Efficiency, Low-I Q PMICs with
Dynamic Core for PDAs and Smart Phones
Power-OK Output (POK)
POK is an open-drain output that goes low when any
MAIN BATTERY
IN
activated regulator (V1 –V6) is below its regulation
threshold. POK does not monitor V7. When all active
R4
334k Ω
R5
200k Ω
R6
500k Ω
R7
200k Ω
MAX1586
DBI (1.232V THRESHOLD)
LBI (1.00V THRESHOLD)
output voltages are within 10% of regulation, POK is
high impedance. POK does not flag an out-of-regula-
tion condition while V3 is transitioning between voltages
set by serial programming or when any regulator chan-
nel has been turned off. POK momentarily goes low
when any regulator is turned on, but returns high when
that regulator reaches regulation. When all regulators
(V1–V6) are off, POK is forced low. If the input voltage
is below the UVLO threshold, POK is held low and
maintains a valid low output with V IN as low as 1V. If
Figure 4. Setting the Low-Battery and Dead-Battery Thresholds
with Separate Resistor-Dividers. The values shown set a DBI
threshold of 3.3V and an LBI threshold of 3.5V (no resistors are
needed for factory-preset thresholds).
where V LB is the desired low-battery detection voltage
and V DB is the desired dead-battery detection voltage.
V LBITH is the LBI threshold (1.0V typ) and V DBITH is the
DBI threshold (1.232V typ).
Alternately, LBI and DBI can be set with separate two-
resistor-dividers. Choose the lower resistor of the divider
chain to be 250k Ω or less (R5 and R7 in Figure 4). The
equations for upper divider-resistors as a function of
each threshold are then:
BKBT is not powered, POK does not function and is
high impedance.
Connection to Processor
and Power Sequencing
Typical processor connections have only power-control
pins, typically labeled PWR_EN and SYS_EN. The
MAX1586/MAX1587 provide numerous on/off control
pins for maximum flexibility. In a typical application,
many of these pins are connected together. ON1, ON2,
and ON6 typically connect to SYS_EN. ON3, ON4, and
ON5 typically connect to PWR_EN. V7 remains on as long
as the main or backup power is connected. Sequencing
is not performed internally on the MAX1586/MAX1587;
however, all ON_ inputs have hysteresis and can connect
to RC networks to set sequencing. For typical connec-
R 4 = R 5 × ?
? 1 ?
?
?
V DB
V DBITH
?
?
tions to Intel CPUs, no external sequencing is required.
Backup-Battery Input
The backup-battery input (BKBT) provides backup
R 6 = R 7 × ?
? 1 ?
? V LB
? V LBITH
?
?
power for V7 when V1 is disabled. Normally, a primary
or rechargeable backup battery is connected to this
pin. If a backup battery is not used, then BKBT should
connect to IN through a diode or external regulator. See
When resistors are used to set V LB , the threshold at LBI
is 1.00V. When resistors are used to set V DB , the
threshold at DBI is 1.232V. A resistor-set threshold can
also be used for only one of DBI or LBI. The other
threshold can then be factory set by connecting the
appropriate input to IN.
If BKBT is not powered, DBO does not function and is
high impedance. DBO is expected to connect to
nBATT_FAULT on Intel CPUs. If BKBT is not powered,
LBO does not function and is high impedance.
the Backup-Battery and V7 Configurations section for
information on how to use BKBT and V7.
Serial Interface
An I 2 C-compatible, two-wire serial interface controls
REG3 on the MAX1587, and REG3 and REG6 on the
MAX1586. The serial interface operates when V IN
exceeds the 2.40V UVLO threshold and at least one of
ON1–ON6 is asserted. The serial interface is shut down
to minimize off-current drain when no regulators are
enabled.
______________________________________________________________________________________
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