参数资料
型号: MAX16021PTER+T
厂商: Maxim Integrated Products
文件页数: 14/21页
文件大小: 0K
描述: IC SUPERVISOR OD 2.640V 16TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 简单复位/加电复位
监视电压数目: 1
输出: 开路漏极或开路集电极
复位: 高有效/低有效
复位超时: 最小 145 ms
电压 - 阀值: 2.64V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-WQFN 裸露焊盘
供应商设备封装: 16-TQFN-EP(4x4)
包装: 带卷 (TR)
Low-Power μP Supervisory Circuits with
Battery-Backup Circuit and Chip-Enable Gating
Detailed Description
The Typical Application Circuit shows a typical connec-
tion using the MAX16020. OUT powers the static ran-
dom-access memory (SRAM). If V CC is greater than the
reset threshold (V TH ), or if V CC is lower than V TH , but
higher than V BATT , V CC connects to OUT. If V CC is lower
than V TH and V CC is less than V BATT , BATT connects to
OUT (see the Functional Diagrams). In battery-backup
mode, an internal MOSFET connects the backup battery
to OUT. The on-resistance of the MOSFET is a function of
backup-battery voltage and temperature.
Backup-Battery Switchover
In a brownout or power failure, it may be necessary to
preserve the contents of the RAM. With a backup battery
installed at BATT, the MAX16016/MAX16020/MAX16021
automatically switch the RAM to the backup power when
V CC falls. The MAX16016/MAX16020/MAX16021 have a
BATTON output that goes high when in battery-backup
mode. These devices require two conditions before
switching to battery-backup mode:
1) V CC must be below the reset threshold.
2) V CC must be below V BATT .
Table 3 lists the status of the inputs and outputs in bat-
tery-backup mode. The device does not power up if the
only voltage source is on BATT. OUT only powers up
from V CC at startup.
CE Signal Gating
The MAX16020/MAX16021 provide internal gating of
CE signals to prevent erroneous data from being written
to CMOS RAM in the event of a power failure or
Table 3. Input and Output Status in
Battery-Backup Mode
brownout. During normal operation, the CE gate is
enabled and passes all CE transitions. When the reset
output asserts, this path becomes disabled, preventing
erroneous data from corrupting the CMOS RAM.
CE OUT is pulled up to OUT through an internal current
source. The 1.5ns propagation delay from CE IN to
CE OUT allows the devices to be used with most μPs
and high-speed DSPs.
During normal operation (reset not asserted), CE IN is
connected to CE OUT through a low on-resistance
transmission gate. If CE IN is high when a reset asserts,
CE OUT remains high regardless of any subsequent
transition on CE IN during the reset event.
If CE IN is low when reset asserts, CE OUT is held low
for 12μs to allow completion of the read/write operation.
After the 12μs delay expires, CE OUT goes high and
stays high regardless of any subsequent transitions on
CE IN during the reset event. When CE OUT is disconnect-
ed from CE IN, CE OUT is actively pulled up to OUT.
The propagation delay through the CE circuitry
depends on both the source impedance of the drive to
CE IN and the capacitive loading at CE OUT. Minimize
the capacitive load at CE OUT to minimize the propaga-
tion delay, and use a low output-impedance driver.
Low-Line Output ( LL )
The low-line comparator monitors V CC with a threshold
voltage typically 2.5% higher than the reset threshold
(see Table 2). LL asserts prior to a reset condition during
a brownout condition. On power-up, LL deasserts after
the reset output. LL can be used to provide a nonmask-
able interrupt (NMI) to the μP when the voltage begins to
fall to initiate an orderly software shutdown routine.
Manual Reset Input
Many μP-based products require manual reset capability,
PIN
V CC
OUT
BATT
RESET/ RESET
BATTON, WDO
BATTOK, LL
CE IN
CE OUT
PFO
STATUS
Disconnected from OUT
Connected to BATT
Connected to OUT. Current drawn from the
battery is less than 0.55μA (at V BATT = 3V,
excluding I OUT ) when V CC = 0V.
Asserted
High state (push-pull), high impedance
(open-drain)
Low state
Disconnected from CE OUT
Pulled up to V OUT
Not affected
allowing the operator, a test technician, or external logic
circuitry to initiate a reset. For the MAX16016/MAX16020/
MAX16021, a logic-low on MR asserts RESET/ RESET .
RESET/ RESET remains asserted while MR is low. When
MR goes high RESET/ RESET deasserts after a minimum
of 145ms (t RP ). MR has an internal 30k ? pullup resistor to
V CC . MR can be driven with TTL/CMOS logic levels or
with open-drain/collector outputs. Connect a normally
open momentary switch from MR to GND to create a
manual reset function; external debounce circuitry is not
required. If MR is driven from a long cable or the device is
used in a noisy environment, connect a 0.1μF capacitor
from MR to GND to provide additional noise immunity.
14
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MAX16021PTES+ 功能描述:监控电路 uPwr w/Bat-Backup 2.946V RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟(典型值):10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel
MAX16021PTES+T 功能描述:监控电路 uPwr w/Bat-Backup 2.946V RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟(典型值):10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel
MAX16021PTET+ 功能描述:监控电路 uPwr w/Bat-Backup 3.100V RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟(典型值):10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel
MAX16021PTET+T 功能描述:监控电路 uPwr w/Bat-Backup 3.100V RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟(典型值):10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel
MAX16021PTEV+ 功能描述:监控电路 uPwr w/Bat-Backup 1.571V RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟(典型值):10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel