参数资料
型号: MAX16024PTBY+T
厂商: Maxim Integrated Products
文件页数: 3/17页
文件大小: 0K
描述: IC BATTERY BACKUP ADJ 10TDFN-EP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
功能: 备份管理
电池化学: 所有电池类型
电源电压: 1.53 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-WFDFN 裸露焊盘
供应商设备封装: 10-TDFN-EP(3x3)
包装: 带卷 (TR)
Battery-Backup Circuits with
Regulated Output Voltage
ELECTRICAL CHARACTERISTICS (continued)
(V CC = 1.53V to 5.5V, V BATT = 3V, reset not asserted, T A = T J = -40°C to +85°C, C OUT = 10μF, unless otherwise noted. Typical val-
ues are at T A = T J = +25°C.) (Note 2)
PARAMETER
Line Regulation
Load Regulation
SYMBOL
CONDITIONS
V CC = (V OUT + 1V) to (V OUT + 2V),
I OUT = 1mA
V CC = V OUT + 1V, I OUT = 1mA to 2mA
MIN
TYP
0.2
0.15
MAX
1.0
1.0
UNITS
%/V
%
LDO = 1.2V
LDO = 1.8V
500
200
Dropout Voltage
I OUT = 50mA
(Note 4)
LDO = 2.5V
180
mV
LDO = 3V
LDO = 3.3V
150
150
Output Current Limit
Battery Freshness Leakage
Current
V CC = 1.6V
V CC ≥ 2V
V BATT = 5.5V
75
150
10
mA
nA
RESET OUTPUT ( RESET )
Reset Threshold
V TH
(See Table 1)
V
V CC Falling to Reset Delay
t RD
V CC falling at 10V/ms
20
μs
Reset Timeout Period
t RP
V CC rising
145
215
285
ms
V OUT = 3.3V, I SINK = 3.2mA, RESET asserted
0.3
RESET Output Low Voltage
V OL
V OUT = 1.8V, I SINK = 1mA, RESET asserted
0.3
V
V OUT = 1.2V, I SINK = 100μA, RESET asserted
0.3
RESET Output High Voltage
(Push-Pull Output)
RESET Output Leakage Current
(Open-Drain Output)
V OH
V CC ≥ 1.1 x V TH , I SOURCE = 100μA,
RESET deasserted
V RESET = 5.5V, reset deasserted
V OUT - 0.3V
1
V
μA
POWER-FAIL COMPARATOR (PFI, PFO )
PFI Input Threshold
V PFT
V PFI falling, 1.6V ≤ V CC ≤ 5.5V
0.570
0.590
0.611
V
PFI Input Hysteresis
V PFI-HYS
30
mV
PFI Input Current
I PFI
-1
+1
μA
PFO Output Low Voltage
PFO Output High Voltage
(Push-Pull Output)
PFO Leakage Current
(Open-Drain Output)
PFO Delay Time
V OUT = 1.8V, I SINK = 1mA, PFO asserted
V OUT =1.2V, I SINK = 100μA, PFO asserted
I SOURCE = 100μA, PFO deasserted
V PFO = 5.5V, PFO deasserted
(V PFI + 100mV) to (V PFI - 100mV)
V OUT - 0.3V
20
0.3
0.3
1
V
V
μA
μs
MANUAL RESET ( MR )
Input Low Voltage
Input High Voltage
Pullup Resistance
Glitch Immunity
MR to Reset Delay
V IL
V IH
Pullup resistance to V CC
0.7 x V CC
20
30
100
120
0.3 x V CC
V
k Ω
ns
ns
_______________________________________________________________________________________
3
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