参数资料
型号: MAX16074RS31D3+T
厂商: Maxim Integrated Products
文件页数: 7/8页
文件大小: 0K
描述: IC MPU SUPERVISOR CIRCUIT 4UCSP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 简单复位/加电复位
监视电压数目: 1
输出: 开路漏极或开路集电极
复位: 低有效
复位超时: 最小为 140 ms
电压 - 阀值: 3.08V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 4-WFBGA,CSPBGA
供应商设备封装: 4-UCSP(2x2)
包装: 带卷 (TR)
μP Supervisory Circuits in
4-Bump (1mm x 1mm) Chip-Scale Package
T A = +25 N C
T A = -40 N C to +85 N C
Manual Reset Input ( MR )
Many F P-based products require manual-reset capabil-
ity, allowing the operator, a test technician, or external
logic circuit to initiate a reset. A logic-low on MR asserts
reset. Reset remains asserted while MR is low, and for
the reset active timeout period (t RP ) or delay (t ON ) after
MR returns high. This input has an internal 50k I pullup
resistor, so it can be left unconnected if it is not used.
MR can be driven with TTL or CMOS logic levels, or
with open-drain/collector outputs. For manual operation,
connect a normally open momentary switch from MR to
GND; external debouncing circuitry is not required. If MR
is driven from long cables or if the device is used in a
noisy environment, connect a 0.1 F F capacitor from MR to
Table 1. Factory Trimmed Reset
Thresholds
RESET TRIP THRESHOLD (V)
THRESHOLD
SUFFIX
TYP MIN MAX
15 1.58 1.54 1.61
16 1.63 1.60 1.66
17 1.67 1.62 1.71
18 1.80 1.76 1.85
19 1.90 1.85 1.95
20 2.00 1.95 2.05
21 2.10 2.05 2.15
ground to provide additional noise immunity.
Applications Information
Interfacing to μ P with
Bidirectional Reset Pins
Since RESET on the MAX16074 is open-drain, this
device interfaces easily with F Ps that have bidirectional
reset pins. Connecting the F P supervisor’s RESET output
directly to the F P’s RESET pin with a single pullup resis-
tor allows either device to assert reset (Figure 2).
Negative-Going V CC Transients
The MAX16072/MAX16073/MAX16074 family of devic-
22
23
24
25
26
27
28
29
30
31
2.20
2.32
2.40
2.50
2.63
2.70
2.80
2.93
3.00
3.08
2.145
2.262
2.34
2.437
2.564
2.633
2.63
2.857
2.925
3.003
2.25
2.375
2.46
2.562
2.69
2.768
2.87
3.0
3.075
3.15
es is relatively immune to short-duration, negative-
going V CC transients (glitches). The Typical Operating
Characteristics show the Maximum Transient Duration
vs. Reset Threshold Overdrive graph, for which reset
Table 2. Reset Timeout Periods
RESET TIMEOUT PERIODS
SUFFIX MIN TYP MAX
UNITS
pulses are not generated. The graph shows the maxi-
mum pulse width that a negative-going V CC transient
may typically have when issuing a reset signal. As the
amplitude of the transient increases, the maximum allow-
able pulse width decreases.
0
1
2
3
20
8
34
140
80
13
52
210
120
17
69
280
F s
ms
ms
ms
V CC
V CC
MAX16074
V CC
μP
MOTOROLA
68HCXX
MR
GND
RESET
RESET
INPUT
GND
Figure 2. Interfacing to μ P with Bidirectional Reset Pins
_______________________________________________________________________________________
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