参数资料
型号: MAX1640EEE+T
厂商: Maxim Integrated Products
文件页数: 5/12页
文件大小: 0K
描述: IC SW-MODE CUR SOURCE ADJ 16QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
功能: 充电管理
电池化学: 锂离子,锂聚合物,镍镉,镍氢
电源电压: 5.5 V ~ 26 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
供应商设备封装: 16-QSOP
包装: 带卷 (TR)
MAX1640/MAX1641
Adjustable-Output, Switch-Mode
Current Source with Synchronous Rectifier
____________________________Typical Operating Characteristics (continued)
(Circuit of Figure 1, T A = +25°C, unless otherwise noted.)
A
B
CURRENT-MODE CHANGE RESPONSE TIME
2ms/div
V IN = 12V, V SET = 1V, R LOAD = 4 Ω, NO OUTPUT CAPACITOR
A: OUTPUT CURRENT, D0 = D1 = 0 1A/div
B: LOAD VOLTAGE, AC coupled, 500mV/div
0A
0V
A
B
EXITING OFF MODE
20 μ s/div
V IN = 12V, R LOAD = 4 Ω
A: D0 = D1 = 1 2V/div
B: OUTPUT CURRENT, 0.5A/div
______________________________________________________________Pin Description
PIN
1
2
3, 4
5
6
7
8
9
10
11
12
13
14
15
16
NAME
LDOL
TOFF
D1, D0
CC
REF
SET
TERM
GND
CS-
CS+
PGND
NDRV
PDRV
LDOH
IN
FUNCTION
Internal, Ground-Referenced Low-Dropout Linear Regulator Output.
Bypass LDOL with a 0.1μF capacitor in parallel with a 4.7μF capacitor to GND.
Off-Time Select Input. A resistor (R TOFF ) connected from TOFF to GND programs the off-time for the hys-
teretic PWM step-down converter. This resistor also sets the period in duty-cycle mode. See Duty-Cycle
Mode and Programming the Off-Time.
Digital Inputs. Select mode of operation (Table 1).
Constant-Current Loop Compensation Input. Bypass CC with a 0.01μF capacitor to GND.
Reference Voltage Output (V REF = 2V). Bypass REF with a 0.1μF capacitor to GND.
Current Select Input. Program the desired current level by applying a voltage at SET between 0V and V REF ,
(I = V SET / 13.3R SENSE ). See Figure 2.
Maximum Output Voltage Termination Input. When V TERM exceeds the reference voltage, the comparator
resets the internal PWM latch, shutting off the external P-channel FET.
Ground
Negative Current-Sense Comparator Input
Positive Current-Sense Comparator Input
High-Current Ground Return for the output drivers
Gate Drive for an optional N-channel FET synchronous rectifier
Gate Drive for the P-channel FET
Internal, Input-Referenced Low-Dropout Linear Regulator Output.
Bypass LDOH with a 0.33μF capacitor to IN.
Power-Supply Input. Input of the internal, low-dropout linear regulators.
Maxim Integrated
5
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