参数资料
型号: MAX16834EVKIT+
厂商: Maxim Integrated Products
文件页数: 21/23页
文件大小: 0K
描述: EVAL KIT FOR MAX16834
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
电流 - 输出 / 通道: 1A
输出及类型: 1,非隔离
输出电压: 28V
特点: 可调光
输入电压: 7 ~ 28V
已供物品:
已用 IC / 零件: MAX16834
MAX16834
High-Power LED Driver with Integrated High-Side LED
Current Sense and PWM Dimming MOSFET Driver
Layout Recommendations
Typically, there are two sources of noise emission in a
switching power supply: high di/dt loops and high dv/dt
surfaces. For example, traces that carry the drain cur-
rent often form high di/dt loops. Similarly, the heatsink
of the MOSFET connected to the device drain presents
a dv/dt source; therefore, minimize the surface area of
the heatsink as much as is compatible with the MOS-
FET power dissipation or shield it. Keep all PCB traces
carrying switching currents as short as possible to mini-
mize current loops. Use ground planes for best results.
Careful PCB layout is critical to achieve low switching
losses and clean, stable operation. Use a multilayer
board whenever possible for better noise immunity and
power dissipation. Follow these guidelines for good
PCB layout:
1) Use a large contiguous copper plane under the
MAX16834 package. Ensure that all heat-dissipat-
ing components have adequate cooling.
2) Isolate the power components and high-current
path from the sensitive analog circuitry.
3) Keep the high-current paths short, especially at the
ground terminals. This practice is essential for sta-
ble, jitter-free operation. Keep switching loops short
such that:
a) The anode of D1 must be connected very close
to the drain of the MOSFET Q1.
Maxim Integrated
b) The cathode of D1 must be connected very
close to C OUT .
c) C OUT and the current-sense resistor R8 must be
connected directly to the ground plane.
4) Connect PGND and SGND to a star-point configura-
tion.
5) Keep the power traces and load connections short.
This practice is essential for high efficiency. Use
thick copper PCBs (2oz vs.1oz) to enhance full-load
efficiency.
6) Route high-speed switching nodes away from the
sensitive analog areas. Use an internal PCB layer
for the PGND and SGND plane as an EMI shield to
keep radiated noise away from the device, feed-
back dividers, and analog bypass capacitors.
7) To prevent discharge of the compensation capaci-
tors during the off-time of the dimming cycle,
ensure that the PCB area close to these compo-
nents has extremely low leakage. Discharge of
these capacitors due to leakage results in reduced
performance of the dimming circuitry.
21
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