参数资料
型号: MAX16948AGTE/V+T
厂商: Maxim Integrated Products
文件页数: 12/15页
文件大小: 0K
描述: IC LDO/SWITCH ADJ DUAL 16TQFN
标准包装: 2,500
应用: 汽车系统,远程电源
电流 - 电源: 2.1mA
电源电压: 4.5 V ~ 28 V
工作温度: -40°C ~ 105°C
安装类型: *
封装/外壳: *
供应商设备封装: *
包装: *
MAX16948
Automotive Dual Remote Antenna
Current-Sense LDO/Switch
R LIM_ ( ? ) =
R SENSE_ ( ? ) =
Undervoltage and Overvoltage Lockout
The device includes undervoltage lockout circuitry
(UVLO) to prevent erroneous switch operation when the
input voltage goes below 4.45V (max) during startup and
brownout conditions. Input voltages of less than 4.45V
inhibit operation of the device by turning off the internal
charge pump and the switch.
The device also features an overvoltage lockout (OVLO)
threshold of +21V (typ). When V IN is greater than V OVLO,
the device immediately turns off the switch and the inter-
nal charge pump.
Shutdown ( SHDN1 , SHDN2 )
The device features two active-low shutdown inputs
( SHDN1 , SHDN2 ) to place the device in a low-power
shutdown mode. SHDN1 controls OUT1 and SHDN2
controls OUT2. The device turns off both channels and
consumes a maximum of 7 F A (at V IN = 12V) of shutdown
current when both SHDN1 and SHDN2 are low. Driving
SHDN1 and/or SHDN2 high initiates device turn-on with
short-to-battery detection. SHDN1 and SHDN2 are pulled
to GND with an internal 500k I resistor.
Internal Voltage Regulator (REG)
The device features an internal regulator that regulates
the input voltage to +5V to power all internal circuitry.
Bypass the regulator output (REG) to GND with a 1 F F
ceramic capacitor. The REG output can be used to sup-
ply external circuitry up to a maximum 15mA current.
Applications Information/External
Component Selection
Fixed/Adjustable Output Voltage
The device is configurable to provide a fixed 8.5V output
or as an adjustable LDO with an output between 1V and
12.5V. Connect FB_ to REG to configure the device as
an 8.5V LDO. Connect a resistive divider between OUT_,
Current-Limit Resistor and
Capacitor Selection
The current-sense outputs at LIM1/LIM2 are proportional
to the load current at OUT1/OUT2 and are internally con-
nected to a current-limit comparator referenced to 2.5V.
The desired current limit is set with an external resistor
R LIM_ using the following equation:
2.5(V)
0.5% × I LOAD_MAX(A)
A 0.1 F F compensation capacitor C LIM_ must be placed
in parallel with R LIM_ to establish a dominant pole in the
current limiting loop to maintain stability and to prevent
fast current transients from prematurely triggering the
current limit.
Current-Sense Resistor Selection
The current-sense outputs SENSE1/SENSE2 are pro-
portional to the load current at OUT1/OUT2. An output
resistor R SENSE _ must be connected between SENSE1/
SENSE2 and GND to generate a current-sense voltage
prior to sampling by an ADC. R SENSE is calculated using
the following equation:
V ADC,FS (V)
0.5% × I LOAD_MAX(A)
where V ADC,FS is the full-scale input voltage of the ADC. A
0.1 F F capacitor C SENSE should be placed in parallel with
R SENSE to hold the voltage during ADC sampling cycles.
In addition to ADC sampling, open-load or overcurrent
conditions can be detected by using external comparators
and splitting R SENSE_ into a resistive divider as shown in
Figure 1 . In this circuit the outputs of comparators U1 and
SENSE_
FB_, and GND to set the output to the desired voltage.
FB_ is regulated to 1.0V with Q 3% accuracy for a load
R3
V OC,TH
U1
V OC
= ? OUT_ ? 1 ? R2
? V
?
current between 5mA and 150mA. Select a value for R2
and calculate R1 as follows:
? V ?
R1
? FB_ ?
MAX16948
R4
V OL,TH
U2
V OL
where R2 must be less than or equal to 1k I . Select R1
and R2 such that the maximum input bias current at FB
(±0.5 F A) is negligible compared to the current flowing
through R1 and R2.
Maxim Integrated
R5
Figure 1. Open-Load and Overcurrent Detection Circuit
12
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