参数资料
型号: MAX16976AEE/V+T
厂商: Maxim Integrated Products
文件页数: 16/17页
文件大小: 0K
描述: IC REG BUCK 5V/ADJ 0.6A 16QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 降压(降压)
输出类型: 两者兼有
输出数: 1
输出电压: 5V,1 V ~ 10 V
输入电压: 3.5 V ~ 28 V
PWM 型: 电流模式
频率 - 开关: 220kHz ~ 1MHz
电流 - 输出: 600mA
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
供应商设备封装: 16-QSOP
MAX16976
28V, 600mA Automotive Step-Down Converter
with Low Operating Current
Set the error-amplifier compensation zero formed by R C
and C C at the f pMOD (f zEA = f pMOD ):
Ordering Information
C C =
1
2 π × f pMOD × R C
PART
MAX16976AEE/V+
TEMP RANGE
-40°C to +125°C
PIN-PACKAGE
16 QSOP
/V denotes an automotive qualified part.
If f zMOD is less than 5 O f C , add a second capacitor, C F ,
from COMP to GND. Set f pEA = f zMOD and calculate C F
as follows:
+ Denotes a lead(Pb)-free/RoHS-compliant package.
Chip Information
C F =
1
2 π × f zMOD × R C
PROCESS: BiCMOS
Package Information
PCB Layout Guidelines
Careful PCB layout is critical to achieve low switching
losses and clean, stable operation. Use a multilayer board
whenever possible for better noise immunity and power
dissipation. Follow these guidelines for good PCB layout:
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages . Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
1) Use a large contiguous copper plane under the
device package. Ensure that all heat-dissipating com-
ponents have adequate cooling.
2) Isolate the power components and high-current path
PACKAGE
TYPE
16 QSOP
PACKAGE
CODE
E16+4
OUTLINE
NO.
LAND
PATTERN NO.
from the sensitive analog circuitry. This is essential to
prevent any noise coupling into the analog signals.
3) Keep the high-current paths short, especially at the
ground terminals. This practice is essential for stable,
jitter-free operation. Make the high-current path com-
prising of an input capacitor, high-side FET, inductor,
and the output capacitor as short as possible.
4) Keep the power traces and load connections short. This
practice is essential for high efficiency. Use thick copper
PCBs (2oz vs. 1oz) to enhance full-load efficiency.
5) Route the analog signal lines away from the high-
frequency planes. This ensures integrity of sensitive
signals feeding back into the device.
6) Make the ground connection for the analog and
power section close to the device. This keeps the
ground current loops to a minimum. In cases where
only one ground is used, enough isolation between
analog return signals and high power signals must be
maintained.
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