参数资料
型号: MAX1700EEE+T
厂商: Maxim Integrated Products
文件页数: 11/16页
文件大小: 0K
描述: IC REG BST SYNC ADJ 0.8A 16QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 升压(升压)
输出类型: 可调式
输出数: 1
输出电压: 2.2 V ~ 5.5 V
输入电压: 0.7 V ~ 5.5 V
频率 - 开关: 300kHz
电流 - 输出: 800mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
供应商设备封装: 16-QSOP
1-Cell to 3-Cell, High-Power (1A),
Low-Noise, Step-Up DC-DC Converters
rectifier current has ramped down to 70mA. This forces
Q
Q
R
D
LOGIC HIGH
POUT
P
operation with a discontinuous inductor current.
Synchronous Rectifier
The MAX1700/MAX1701 feature an internal 250m ? , P-
channel synchronous rectifier to enhance efficiency.
Synchronous rectification provides a 5% efficiency
ERROR
COMPARATOR
LX
improvement over similar nonsynchronous boost regu-
lators. In PWM mode, the synchronous rectifier is
FB
S
Q
N
turned on during the second half of each switching
cycle. In low-power mode, an internal comparator turns
REF
400mA
CURRENT
LIMIT
R
PGND
on the synchronous rectifier when the voltage at LX
exceeds the boost-regulator output and then turns it off
when the inductor current drops below 70mA.
Low-Voltage Start-Up Oscillator
The MAX1700/MAX1701 use a CMOS, low-voltage
start-up oscillator for a 1.1V guaranteed minimum start-
up input voltage at +25°C. On start-up, the low-voltage
Figure 4. Controller Block Diagram in Low-Power PFM Mode
Synchronized PWM Operation
By applying an external clock to CLK/SEL, the
MAX1700/MAX1701 can also be synchronized in PWM
mode to a frequency between 200kHz and 400kHz.
This allows the user to set the harmonics to avoid IF
oscillator switches the N-channel MOSFET until the out-
put voltage reaches 2.15V. Above this level, the normal
boost-converter feedback and control circuitry take
over. Once the device is in regulation, it can operate
down to a 0.7V input since internal power for the IC is
bootstrapped from the output using the OUT pin. Do
not apply full load until the output exceeds 2.4V.
bands in wireless applications. The synchronous rectifi-
er is also active during synchronized PWM operation.
Table 3. On/Off Logic Control
ONA O N B
Status
Low-Power PFM Operation
Pulling CLK/SEL low places the MAX1700/MAX1701 in
a low-power mode. During low-power mode, PFM oper-
ation regulates the output voltage by transferring a
fixed amount of energy during each cycle and then
0
0
1
1
0
1
0
1
On
Off
On
On
modulating the switching frequency to control the
power delivered to the output. The devices switch only
as needed to service the load, resulting in the highest
possible efficiency at light loads. Output current capa-
bility in PFM mode is 100mA. The output voltage is typi-
cally 1% higher than the output voltage in PWM mode.
During PFM operation, the error comparator detects the
output voltage falling out of regulation and sets a flip-
flop, turning on the N-channel MOSFET switch (Figure
4). When the inductor current ramps to the PFM mode
current limit (400mA typical) and stores a fixed amount
of energy, the current-sense comparator resets a flip-
flop. The flip-flop turns off the N-channel switch and
turns on the P-channel synchronous rectifier. A second
flip-flop, previously reset by the switch’s “on” signal,
inhibits the error comparator from initiating another
cycle until the energy stored in the inductor is trans-
ferred to the output filter capacitor and the synchronous
Shutdown
The MAX1700/MAX1701 shut down to reduce quies-
cent current to typically 3μA. During shutdown, the ref-
erence, low-battery comparator, gain block, and all
feedback and control circuitry are off. The boost con-
verter’s output drops to one Schottky diode drop below
the input.
Table 3 shows the control logic with ONA and ONB .
Both inputs have trip points near 0.5V OUT with
0.15V OUT hysteresis.
Low-Battery Comparator (MAX1701)
The internal low-battery comparator has uncommitted
inputs and an open-drain output (LBO) capable of sink-
ing 1mA. To use it as a low-battery-detection compara-
tor, connect the LBN input to the reference, and
connect the LBP input to an external resistor divider
______________________________________________________________________________________
11
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