参数资料
型号: MAX1702B
厂商: Maxim Integrated Products, Inc.
英文描述: Triple-Output Power-Management IC for Microprocessor-Based Systems
中文描述: 三输出电源管理器IC,用于微处理器应用系统
文件页数: 11/19页
文件大小: 820K
代理商: MAX1702B
M
Triple-Output Power-Management IC for
Microprocessor-Based Systems
______________________________________________________________________________________
11
Pin Description
PIN
NAME
FUNCTION
1, 9, 13, 18,
19, 26, 27,
31, 35
N.C.
No Connection. These pins are not internally connected.
2
LBI
Low-Battery Input. Connect a resistive voltage-divider from the battery voltage to LBI to set the low-
battery threshold. LBI threshold voltage is 1.235V.
3
DBI
Dead-Battery Input. Connect a resistive voltage-divider from the battery voltage to DBI to set the
dead-battery voltage threshold. When the voltage at DBI is below the 1.25V threshold, the MAX1702B
is turned off and draws only 5μA from the battery.
4
ON2
REG2 On/Off Input. Drive ON2 high to turn on REG2, drive it low to turn it off. When enabled, the
MAX1702B soft-starts REG2, when disabled, the output of REG2 is internally discharged to PG2.
5
PGM3
REG3 Regulation Voltage-Control Input. Connect PGM3 to IN, REF, or GND to set the REG3 output
regulation voltage. Connect PGM3 to GND for 1.8V, REF for 2.5V, and IN for 3.3V.
Connect Pin 6 to Pin 8
6
GND
7
REF
Reference Output. Output of the 1.25V reference. Bypass REF to GND with a 0.1μF or greater
capacitor.
8
GND
Analog Ground. Connect GND to a local analog ground plane with no high-current paths. GND
should be connected to the main ground plane at a single point as close to the IC and the IN bypass
capacitor as possible. Connect the ground of the low-noise components, such as resistive voltage-
dividers and reference bypass capacitor to the analog ground plane.
10
IN
Analog Supply Input. Bypass IN to GND with a 1μF or greater low-ESR capacitor.
11
RSO
Reset Output.
RSO
is low (sinks current to GND) during initial startup or while the manual reset input,
MR
, is asserted.
RSO
remains low for 65.5ms after all regulators are in regulation or after
MR
is
deasserted.
RSO
is an open-drain output. RSO remains high when REG2 is turned off. The
RSO
line
maintains a valid low output for IN as low as 1V.
12
PG1
REG1 Power Ground. Connect PG1 directly to a power ground plane. Connect PG1, PG2, PG3 and
GND together at a single point as close to the IC as possible.
14
LX1
REG1 Power-Switching Node. Connect the external inductor of the REG1 output LC filter from LX1 to
OUT1 (see the
Inductor Selection
section).
15
INP1
REG1 Power Input. Bypass INP1 to PG1 with a 1.0μF or greater low-ESR capacitor. INP1, INP2, INP3,
and IN must be connected together externally. A single 4.7μF capacitor can be used for INP1, INP2,
and INP3.
16
MR
Manual Reset Input. A momentary low on
MR
forces
RSO
to go low.
RSO
remains low as long as
MR
is low, and returns high 65.5ms after
MR
returns high and all output voltages are in regulation.
17
COMP1
REG1 Compensation Node. Connect a series resistor and capacitor from COMP1 to GND in parallel
with a 33pF capacitor to compensate REG1 (see the
Compensation and Stability
section).
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