参数资料
型号: MAX1721EUT-T
厂商: Maxim Integrated Products
文件页数: 5/8页
文件大小: 0K
描述: IC REG SWITCHED CAP INV SOT23-6
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 切换式电容器(充电泵),反相
输出类型: 可调式
输出数: 1
输出电压: -1.5 V ~ -5.5 V
输入电压: 1.5 V ~ 5.5 V
频率 - 开关: 60kHz ~ 200kHz
电流 - 输出: 25mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: SOT-23-6
包装: 带卷 (TR)
供应商设备封装: SOT-6
SOT23, Switched-Capacitor
Voltage Inverters with Shutdown
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V IN = +5V, SHDN = GND (MAX1719), SHDN = IN (MAX1720/MAX1721), C1 = C2 = C3, T A = +25°C, unless
otherwise noted.)
MAX1721
START-UP FROM SHUTDOWN
MAX1720/21toc13
35
MAX1719/MAX1721
OUTPUT CURRENT vs. CAPACITANCE
MAX1719/MAX1721
OUTPUT VOLTAGE RIPPLE vs. CAPACITANCE
400
30
V IN = +4.75V, V OUT = -4.0V
350
V OUT
2V/div
V SHDN
5V/div
25
20
15
10
5
V IN = +3.15V, V OUT = -2.5V
V IN = +1.9V, V OUT = -1.5V
300
250
200
150
100
50
V IN = +4.75V, V OUT = -4.0V
V IN = +3.15V, V OUT = -2.5V
V IN = +1.9V, V OUT = -1.5V
0
0
R L = 1k ?
50 μ s/div
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
CAPACITANCE ( μ F)
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
CAPACITANCE ( μ F)
Pin Description
PIN
MAX1719
1
2
3
4
5
6
MAX1720
MAX1721
1
2
3
4
5
6
NAME
OUT
IN
C1-
GND
SHDN
SHDN
C1+
FUNCTION
Inverting Charge-Pump Output
Power-Supply Positive Voltage Input
Negative Terminal of Flying Capacitor
Ground
Noninverting Shutdown Input. Drive this pin low for normal operation; drive it high for
shutdown mode. OUT is actively pulled to ground during shutdown.
Inverting Shutdown Input. Drive this pin high for normal operation; drive it low for
shutdown mode. OUT is actively pulled to ground during shutdown.
Positive Terminal of Flying Capacitor
Detailed Description
The MAX1719/MAX1720/MAX1721 capacitive charge
pumps invert the voltage applied to their input. For high-
est performance, use low equivalent series resistance
(ESR) capacitors (e.g., ceramic).
During the first half-cycle, switches S2 and S4 open,
switches S1 and S3 close, and capacitor C1 charges to
the voltage at IN (Figure 2). During the second half-
cycle, S1 and S3 open, S2 and S4 close, and C1 is level
shifted downward by V IN volts. This connects C1 in par-
allel with the reservoir capacitor C2. If the voltage across
C2 is smaller than the voltage across C1, charge flows
from C1 to C2 until the voltage across C2 reaches
-V IN . The actual voltage at the output is more positive
than -V IN , since switches S1–S4 have resistance and the
load drains charge from C2.
_______________________________________________________________________________________
5
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