参数资料
型号: MAX1742EEE+T
厂商: Maxim Integrated Products
文件页数: 11/16页
文件大小: 0K
描述: IC REG BUCK SYNC 1A 16QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 降压(降压)
输出类型: 两者兼有
输出数: 1
输出电压: 1.5V,1.8V,2.5V,可调
输入电压: 3 V ~ 5.5 V
PWM 型: 电流模式,混合
频率 - 开关: 1MHz
电流 - 输出: 1A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
供应商设备封装: 16-QSOP
1A/2.7A, 1MHz, Step-Down Regulators with
Synchronous Rectification and Internal Switches
constant-off-time mode, the synchronous-rectifier
switch turns off just prior to the PMOS power switch
turning on. While both switches are off, inductor current
Table 1. MAX1742 Recommended
Component Values (I OUT = 1A)
flows through the internal body diode of the NMOS
switch. The internal body diode’s forward voltage is rel-
atively high.
Thermal Resistance
Junction-to-ambient thermal resistance, θ JA , is highly
dependent on the amount of copper area immediately
surrounding the IC leads. The MAX1742 evaluation kit
has 0.5in 2 of copper area and a thermal resistance of
80°C/W with no forced airflow. Airflow over the board
significantly reduces the junction-to-ambient thermal
resistance. For heatsinking purposes, evenly distribute
V IN
(V)
5
5
5
5
3.3
3.3
3.3
V OUT
(V)
3.3
2.5
1.8
1.5
2.5
1.8
1.5
f PWM
(kHz)
850
1070
910
770
610
1050
1000
L
(μH)
5.6
5.6
5.6
5.6
3.9
3.9
3.9
R TOFF
(kΩ)
39
47
75
100
39
43
56
the copper area connected at the IC among the high-
current pins.
Power Dissipation
Power dissipation in the MAX1742/MAX1842 is domi-
Table 2. MAX1842 Recommended
Component Values (Continuous Output
Current = 1A, Burst Output Current = 2.7A)
nated by conduction losses in the two internal power
switches. Power dissipation due to supply current in the
control section and average current used to charge
and discharge the gate capacitance of the internal
switches (i.e., switching losses) is approximately:
P DS = C x V IN2 x f PWM
where C = 2.5nF and f PWM is the switching frequen-
cy in PWM mode.
This number is reduced when the switching frequency
decreases as the part enters Idle Mode. Combined con-
duction losses in the two power switches are approxi-
V IN
(V)
5
5
5
5
3.3
3.3
3.3
V OUT
(V)
3.3
2.5
1.8
1.5
2.5
1.8
1.5
f PWM
(kHz)
800
1180
850
715
570
985
940
L
(μH)
2.2
2.2
2.2
2.2
1.5
1.5
1.5
R TOFF
(kΩ)
39
47
75
100
39
43
56
mated by:
P D = I OUT2 x R PMOS
where R PMOS is the on-resistance of the PMOS switch.
MAXIMUM RECOMMENDED
OPERATING FREQUENCY vs. INPUT VOLTAGE
The junction-to-ambient thermal resistance required to
dissipate this amount of power is calculated by:
θ JA = (T J,MAX - T A,MAX ) / P D(T OT )
where: θ JA = junction-to-ambient thermal resistance
T J,MAX = maximum junction temperature
T A,MAX = maximum ambient temperature
P D(TOT) = total losses
__________________Design Procedure
For typical applications, use the recommended compo-
1400
1200
1000
800
600
400
200
V OUT = 1.5V
V OUT = 1.8V
V OUT = 2.5V
V OUT = 3.3V
nent values in Tables 1 or 2. For other applications,
take the following steps:
1) Select the desired PWM-mode switching frequency;
0
2.6
3.1
3.6
4.1
V IN (V)
4.6
5.1
5.6
1MHz is a good starting point. See Figure 3 for maxi-
mum operating frequency.
Figure 3. Maximum Recommended Operating Frequency vs.
Input Voltage
______________________________________________________________________________________
11
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