参数资料
型号: MAX1772EEI+T
厂商: Maxim Integrated Products
文件页数: 2/20页
文件大小: 0K
描述: IC BAT CHRG BUILD BLCK 28QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
功能: 充电管理
电池化学: 多化学
电源电压: 8 V ~ 28 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SSOP(0.154",3.90mm 宽)
供应商设备封装: 28-QSOP
包装: 带卷 (TR)
Low-Cost, Multichemistry Battery-
Charger Building Block
ABSOLUTE MAXIMUM RATINGS
DCIN, CSSP, CSSN to GND ...................................-0.3V to +30V
BST to GND ............................................................-0.3V to +36V
BST to LX..................................................................-0.3V to +6V
DHI to LX ...................................................-0.3V to (V BST + 0.3V)
LX to GND .................................................................-6V to +30V
BATT, CSIP, CSIN to GND........................................-0.3V to 20V
CSIP to CSIN or CSSP to CSSN or
PGND to GND ...........……….……………..…….-0.3V to +0.3V
CCI, CCS, CCV, DLO, ICHG, IINP,
ACIN, REF to GND ...............................-0.3V to (V LDO + 0.3V)
DLOV, VCTL, ICTL, REFIN, CELLS,
CLS, LDO, ACOK to GND ....................................-0.3V to +6V
DLO to PGND .........................................-0.3V to (V DLOV + 0.3V)
LDO Short-Circuit Current ..................................................50mA
Continuous Power Dissipation (T A = +70°C)
28-Pin QSOP (derate 12.6mW/°C above +70°C).......1008mW
Junction-to-Ambient Thermal Resistance ( θ JA )
(Note 1) .....................................................................79.3°C/W
Junction-to-Case Thermal Resistance ( θ JC )
(Note 1) ........................................................................27°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ........................................................150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
DLOV to LDO.........................................................-0.3V to +0.3V
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial .
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V DCIN = V CSSP = V CSSN = 18V, V BATT = V CSIP = V CSIN = 12V, V REFIN = 3.0V, V VCTL = V ICTL = 0.75   V REFIN , V CELLS = 2.0V,
V ACIN = 0V, CLS = REF, V BST - V LX = 4.5V, V GND = V PGND = 0V, C LDO = 1μF, LDO = DLOV, C REF = 1μF; pins CCI, CCS, and CCV
are compensated per Figure 1a; T A = 0°C to +85°C, unless otherwise noted. Typical values are at T A = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SUPPLY AND LDO REGULATOR
DCIN Input Voltage Range
V DCIN
8
28
V
DCIN Undervoltage Lockout
Trip Point
V DCIN falling
V DCIN rising
7.0
7.4
7.5
7.85
V
DCIN Quiescent Current
I DCIN
8.0V < V DCIN < 28V
2.7
6.0
mA
LDO Output Voltage
LDO Load Regulation
LDO Undervoltage Lockout
Trip Point
REF Output Voltage
REF Undervoltage Lockout
Trip Point
8.0V < V DCIN < 28V, no load
0 < I LDO < 10mA
V DCIN = 8.0V
0 < I REF < 500μA
V REF falling
5.25
3.20
4.072
5.40
34
4.00
4.096
3.1
5.55
100
5.15
4.120
3.9
V
mV
V
V
V
TRIP POINTS
BATT POWER_FAIL Threshold
BATT POWER_FAIL Threshold
Hysteresis
ACIN Threshold
ACIN Threshold Hysteresis
ACIN Input Bias Current
CLS Input Range
CLS Input Bias Current
V CSSP falling
V ACIN rising
0.5% of V REF
V ACIN = 2.048V
V CLS = 2.0V
50
100
2.007
10
-1
1.6
-1
100
200
2.048
20
150
300
2.089
30
+1
REF
+1
mV
mV
V
mV
μA
V
μA
SWITCHING REGULATOR
Minimum Off-Time
V BATT =16.8V
1.00
1.25
1.50
μs
2
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