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参数资料
| 型号： | MAX1774EEI+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 10/21页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ DL 28QSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 1 V ~ 5.5 V |
| 输入电压： | 2.7 V ~ 28 V |
| 频率 - 开关： | 1.25MHz |
| 电流 - 输出： | 1.5A，2A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SSOP（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 28-QSOP |
Dual, High-Efficiency, Step-Down
Converter with Backup Battery Switchover
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V IN = +5V, V INC = +3.3V, T A = +25°C, unless otherwise noted.)
TURN-ON RESPONSE
BACKUP SWITCHOVER RESPONSE
5V
MAX1774-14
MAX1774-15
V SHDN
5V/div 0
V MAIN
V CORE
3V
2V
V OUT
1V/div
V BKUP
5V/div
1V
0
I BBATT
50mA/div
INPUT CURRENT
400 μ A
200 μ A
INPUT
CURRENT
200mA/div
V BIN
10mV/div
100 μ s/div
0
5 μ s/div
V MAIN
10mV/div
Pin Description
PIN
QSOP
1
2
3
QFN
30
31
32
NAME
SHDNM
SHDNC
BKUP
FUNCTION
Shutdown for Main Regulator. Low voltage on SHDNM shuts off the main output. For normal
operation, connect SHDNM to IN.
Shutdown for Core Regulator. Low voltage on SHDNC shuts off the core output. For normal
operation, connect SHDNC to CVL.
Open-Drain Backup Input/Output. The device is in backup mode when BKUP is low. BKUP can be
externally pulled low to place the device in backup mode.
Open-Drain Drive Output. MDRV goes low when the ACI voltage drops below the main voltage plus
4
1
MDRV
220mV and device is not in backup. Connect MDRV to the gate of the main battery P-channel
MOSFET to switch the battery to IN when the AC adapter voltage is not present.
5
6
7
2
3
4
PGNDC
PGND
NDRV
Power Ground for the Core Converter. Connect all grounds together close to the IC.
Power Ground. Ground for NDRV and core output synchronous rectifier. Connect all grounds
together close to the IC.
N-Channel Drive Output. Drives the main output synchronous-rectifier MOSFET. NDRV swings
between CVL and PGND.
Low-Side Bypass. CVL is the output of an internal LDO regulator. This is the internal power supply
8
5
CVL
for the device control circuitry as well as the N-channel driver. Bypass CVL with a 1.0μF or greater
capacitor to GND. When CS- is above the CVL switchover threshold (2.47V), CVL is powered from
the main output.
9
10
11
6
7
8
IN
PDRV
CVH
Power Supply Input
P-Channel Drive Output. Drives the main output high-side MOSFET switch. PDRV swings between IN and
CVH. The voltage at CVH is regulated at V IN - 4.2V unless the input voltage is less than 5.5V.
High-Side Drive Bypass. This is the low-side of the P-channel driver output. Bypass with a 1.0μF
capacitor or greater to IN. When the input voltage is less than 5.5V, CVH is switched to PGND.
Backup Converter Switching Node. Connect an inductor from LXB to the backup battery and a
12
9
LXB
Schottky diode to BIN to complete the backup converter. In backup mode, this step-up converter
powers the main output from the backup battery through BIN.
10
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