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| 型号： | MAX1790EUA+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 8/14页 |
| 文件大小： | 0K |
| 描述： | IC REG BOOST ADJ 0.8A 8UMAX |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 升压（升压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 2.6 V ~ 12 V |
| 输入电压： | 2.6 V ~ 5.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 640kHz, 1.22MHz |
| 电流 - 输出： | 1.2A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-TSSOP，8-MSOP（0.118"，3.00mm 宽） |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 8-uMAX |
Low-Noise Step-Up DC-DC Converters
Pin Description
PIN
1
2
3
4
5
6
7
8
NAME
COMP
FB
SHDN
GND
LX
IN
FREQ
SS
FUNCTION
Compensation Pin for Error Amplifier. Connect a series RC from COMP to ground. See the Loop
Compensation section for component selection guidelines.
Feedback Pin. Reference voltage is 1.24V nominal. Connect an external resistor-divider tap to FB and
minimize the trace area. Set V OUT according to: V OUT = 1.24V (1 + R1 / R2). See Figure 1.
Shutdown Control Input. Drive SHDN low to turn off the MAX1790/MAX8715.
Ground
Switch Pin. Connect the inductor/catch diode to LX and minimize the trace area for lowest EMI.
Supply Pin. Bypass IN with at least a 1μF ceramic capacitor directly to GND.
Frequency Select Input. When FREQ is low, the oscillator frequency is set to 640kHz. When FREQ is high,
the frequency is 1.2MHz. This input has a 5μA pulldown current.
Soft-Start Control Pin. Connect a soft-start capacitor (C SS ) to this pin. Leave open for no soft-start. The soft-
start capacitor is charged with a constant current of 4μA. Full current limit is reached after t = 2.5 x 10 5 C SS .
The soft-start capacitor is discharged to ground when SHDN is low. When SHDN goes high, the soft-start
capacitor is charged to 0.5V, after which soft-start begins.
Detailed Description
V IN
The MAX1790/MAX8715 are highly efficient power sup-
plies that employ a current-mode, fixed-frequency
PWM architecture for fast transient response and low-
noise operation. The device regulates the output volt-
age through a combination of an error amplifier, two
2.6V TO 5.5V
L
C IN
C1
10 μ F
6.3V
comparators, and several signal generators (Figure 2).
The error amplifier compares the signal at FB to 1.24V
ON/OFF
SHDN
IN
LX
V OUT
and varies the COMP output. The voltage at COMP
determines the current trip point each time the internal
MOSFET turns on. As the load varies, the error amplifier
sources or sinks current to the COMP output according-
1.2MHz
V IN
MAX1790
MAX8715
FREQ
D1
MBRS130LT1
0.1 μ F*
C OUT
ly to produce the inductor peak current necessary to ser-
vice the load. To maintain stability at high duty cycle, a
640kHz
GND
slope-compensation signal is summed with the current-
sense signal.
At light loads, this architecture allows the ICs to “skip”
0.027 μ F
SS
COMP
FB
R2
R1
cycles to prevent overcharging the output voltage. In
this region of operation, the inductor ramps up to a
fixed peak value (approximately 50mA, MAX1790 or
C COMP2
R COMP
75mA, MAX8715), discharges to the output, and waits
until another pulse is needed again.
C COMP
Figure 1. Typical Application Circuit
* OPTIONAL
8
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