参数资料
型号: MAX1818EUT25#T
厂商: Maxim Integrated
文件页数: 5/9页
文件大小: 0K
描述: IC REG LDO 2.5V/ADJ .5A SOT23-6
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
稳压器拓扑结构: 正,固定式或可调式
输出电压: 2.5V,1.25 V ~ 5 V
输入电压: 2.5 V ~ 5.5 V
电压 - 压降(标准): 0.21V @ 500mA
稳压器数量: 1
电流 - 输出: 500mA(最小)
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: SOT-23-6
供应商设备封装: SOT-6
包装: 带卷 (TR)
500mA Low-Dropout
Linear Regulator in SOT23
Typical Operating Characteristics (continued)
(V IN = (V OUT + 500mV) or +2.5V, whichever is greater; SHDN = IN, C IN = 1μF, C OUT = 3.3μF, T A = +25°C, unless otherwise noted.)
SHORT-CIRCUIT CURRENT LIMIT
SHUTDOWN WAVEFORM
MAX1818 toc12
1.11
vs. SUPPLY VOLTAGE
1.10
V OUT(NOM) = +2V
SHUTDOWN
VOLTAGE
V OUT
POK
0
0
2V/div
0
1.09
1.08
1.07
1.06
1.05
1.04
1.03
1.02
1.01
1.00
200 μ s/div
2.5
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
Pin Description
PIN
1
2
3
4
5
6
NAME
IN
POK
SHDN
GND
SET
OUT
FUNCTION
Regulator Input. Supply voltage can range from 2.5V to 5.5V. Bypass with a 1 μ F capacitor to GND (see
Capacitor Selection and Regulator Stability ).
Open-Drain POK Output. POK remains low while the output voltage (V OUT ) is below the POK threshold.
Connect a 100k Ω pull-up resistor from POK to OUT to obtain an output voltage.
Active-Low Shutdown Input. A logic low reduces supply current below 15 μ A. In shutdown, the POK output is
low, and OUT is high impedance. Connect to IN for normal operation.
Ground
Voltage-Setting Input. Connect to GND for preset output. Connect to a resistive voltage-divider between
OUT and GND to set the output voltage between 1.25V and 5.0V.
Regulator Output. Sources up to 500mA. Bypass with a 3.3 μ F low-ESR capacitor to GND. Use a 4.7 μ F
capacitor for output voltages below 2V.
Detailed Description
The MAX1818 is a low-dropout, low-quiescent-current
linear regulator designed primarily for battery-powered
applications. The device supplies loads up to 500mA
and is available with preset output voltages. As illustrat-
ed in Figure 1, the MAX1818 consists of a 1.25V refer-
ence, error amplifier, P-channel pass transistor, and
internal feedback voltage-divider.
The 1.25V reference is connected to the error amplifier,
which compares this reference with the feedback volt-
age and amplifies the difference. If the feedback volt-
age is lower than the reference voltage, the
pass-transistor gate is pulled lower, which allows more
current to pass to the output and increases the output
voltage. If the feedback voltage is too high, the pass-
transistor gate is pulled up, allowing less current to
pass to the output.
The output voltage is fed back through either an inter-
nal resistive divider connected to OUT or an external
resistor network connected to SET. The Dual Mode
comparator examines V SET and selects the feedback
path. If V SET is below 50mV, the internal feedback path
is used and the output is regulated to the factory-preset
voltage.
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5
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