参数资料
型号: MAX1819EBL33+T
厂商: Maxim Integrated
文件页数: 5/9页
文件大小: 0K
描述: IC REG LDO 3.3V/ADJ .5A 6-UCSP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
稳压器拓扑结构: 正,固定式或可调式
输出电压: 3.3V,1.25 V ~ 5 V
输入电压: 2.5 V ~ 5.5 V
电压 - 压降(标准): 0.133V @ 500mA,-
稳压器数量: 1
电流 - 输出: 500mA(最小)
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 6-WFBGA,CSPBGA
供应商设备封装: 6-uCSP(1.57x1.16)
包装: 带卷 (TR)
500mA Low-Dropout Linear Regulator in UCSP
Typical Operating Characteristics (continued)
(V IN = (V OUT + 500mV) or 2.5V, whichever is greater; SHDN = IN, C IN = 3.3μF, C OUT = 3.3μF, T A = +25°C, unless otherwise noted)
SHORT-CIRCUIT CURRENT LIMIT
SHUTDOWN WAVEFORM
MAX1819 toc12
1.40
vs. SUPPLY VOLTAGE
V OUT(NOM) = 2V
SHUTDOWN
VOLTAGE
0
1.39
1.38
V OUT
0
2V/div
1.37
1.36
P OK
0
1.35
200 μ s/div
2.5
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
Pin Description
PIN
A1
A2
A3
C1
C2
C3
NAME
IN
POK
SHDN
OUT
SET
GND
FUNCTION
Regulator Input. Supply voltage can range from 2.5V to 5.5V. Bypass with a 1μF capacitor to GND (see the
Capacitor Selection and Regulator Stability section).
Open-Drain POK Output. POK remains low while the output voltage (V OUT ) is below the POK threshold.
Connect a 100k ? pullup resistor from POK to OUT to obtain an output voltage.
Active-Low Shutdown Input. A logic low reduces supply current below 15μA. In shutdown, the POK and
OUT are low. Connect to IN for normal operation.
Regulator Output. Sources up to 500mA. Bypass with a 3.3μF low-ESR capacitor to GND. Use a 4.7μF
capacitor for output voltages below 2V.
Voltage-Setting Input. Connect to GND for preset output. Connect to a resistive voltage-divider between
OUT and GND to set the output voltage between 1.25V and 5V.
Ground
Detailed Description
The MAX1819 is a low-dropout, low-quiescent-current
linear regulator designed primarily for battery-powered
applications. The device supplies loads up to 500mA
and is available with preset output voltages. As illustrat-
ed in Figure 1, the MAX1819 consists of a 1.25V refer-
ence, error amplifier, P-channel pass transistor, and
internal feedback voltage-divider.
The 1.25V reference is connected to the error amplifier,
which compares this reference with the feedback volt-
age and amplifies the difference. If the feedback voltage
is lower than the reference voltage, the pass-transistor
gate is pulled lower, which allows more current to pass
to the output and increases the output voltage. If the
feedback voltage is too high, the pass-transistor gate is
pulled up, allowing less current to pass to the output.
The output voltage is fed back through either an inter-
nal resistive-divider connected to OUT or an external
resistor network connected to SET. The Dual Mode
comparator examines V SET and selects the feedback
path. If V SET is below 50mV, the internal feedback path
is used and the output is regulated to the factory-preset
voltage.
_______________________________________________________________________________________
5
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