参数资料
型号: MAX1844ETP+T
厂商: Maxim Integrated Products
文件页数: 8/24页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 20-TQFN
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 600kHz
电源电压: 4.5 V ~ 5.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 20-WFQFN 裸露焊盘
包装: 带卷 (TR)
High-Speed Step-Down Controller with
Accurate Current Limit for Notebook Computers
Pin Description
PIN
QSOP
QFN
NAME
FUNCTION
Current-Sense Input. Connect a low-value current-sense resistor between CS and GND for accurate
1
18
CS
current sensing. For lower power dissipation (less accurate) current sensing, connect CS to LX to
use the synchronous rectifier as the sense resistor. The PWM controller will not begin a cycle unless
the current sensed at CS is less than the current-limit threshold programmed at ILIM.
Overvoltage Protection Latch Control Input. The synchronous rectifier MOSFET is always forced to
2
19
LATCH
the on state when an overvoltage fault is detected. If LATCH is low, the synchronous rectifier remains
on until either OVP is brought high, SHDN is toggled, or V CC is cycled below 1V. If LATCH is high,
normal operation resumes when the overvoltage condition ends.
Shutdown Control Input. Drive SHDN to GND to force the MAX1844 into shutdown. Drive or connect
3
20
SHDN
to V CC for normal operation. A rising edge on SHDN clears the overvoltage and undervoltage
protection fault latches.
Overvoltage Protection Control Input. An overvoltage fault occurs if the internal or external feedback
voltage exceeds the voltage at OVP. Apply a voltage between 1V and 1.8V to set the overvoltage
4
1
OVP
limit between 100% and 180% of nominal output voltage. Connect to GND to assert the default
overvoltage limit at 114% of the nominal output voltage. Connect to V CC to disable overvoltage fault
detection and clear the overvoltage protection fault latch.
Feedback Input. Connect to V CC for a 1.8V fixed output or to GND for a 2.5V fixed output. For an
5
2
FB
adjustable output (1V to 5.5V), connect FB to a resistive-divider from the output voltage. The FB
regulation level is 1V.
Output Voltage Sense Connection. Connect directly to the junction of the external output filter
6
3
OUT
capacitors. OUT senses the output voltage to determine the on-time for the high-side switching
MOSFET. OUT also serves as the feedback input in fixed-output modes.
Current-Limit Threshold Adjustment. The current-limit threshold at CS is 0.1 times the voltage at ILIM.
7
4
ILIM
Connect ILIM to a resistive-divider (typically from REF) to set the current-limit threshold between
25mV and 300mV (with 0.25V to 3V at ILIM). Connect to V CC to assert the 100mV default current-limit
threshold.
8
5
REF
2V Reference Voltage Output. Bypass to GND with a 0.22μF (min) bypass capacitor. Can supply
50μA for external loads. Reference turns off in shutdown.
Undervoltage Protection Control Input. An undervoltage fault occurs if the internal or external
feedback voltage is less than the voltage at UVP. Apply a voltage between 0.4V and 1V to set the
9
6
UVP
undervoltage limit between 40% and 100% of the nominal output voltage. Connect to V CC to assert
the default undervoltage limit of 70% of the nominal output voltage. Connect to GND to disable
undervoltage fault detection and clear the undervoltage protection latch.
Power-Good Open-Drain Output. PGOOD is low when the output voltage is more than 10% above or
10
7
PGOOD
below the normal regulation point or during soft-start. PGOOD is high impedance when the output is
in regulation and the soft-start circuit has terminated. PGOOD is low in shutdown.
11
12
13
8
9
10
GND
DL
V DD
Analog and Power Ground
Synchronous Rectifier Gate-Driver Output. Swings from GND to V DD .
Supply Input for the DL Gate Drive. Connect to the system supply voltage, 4.5V to 5.5V. Bypass to
GND with a 1μF (min) ceramic capacitor.
8
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