参数资料
型号: MAX1865TEEP+T
厂商: Maxim Integrated Products
文件页数: 22/25页
文件大小: 0K
描述: IC PWR SUPPLY CONTROLLER 20QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 电源控制器
输入电压: 4.5 V ~ 28 V
电流 - 电源: 1.4mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-SSOP(0.154",3.90mm 宽)
供应商设备封装: 20-QSOP
包装: 带卷 (TR)
xDSL/Cable Modem Triple/Quintuple Output
Power Supplies
? | V LDO ( NEG ) | + V SAT + V DIODE ?
??
N NEG ≥ ?
?
?
?
C DIODE = O RR
R SNUB = =
only), connect the transformer as shown in Figure 6,
where the minimum turns ratio is determined by:
V OUT
Since power transfer occurs when the low-side MOS-
FET is on (DL = high), the transformer cannot support
heavy loads with high duty cycles.
Snubber Design
The MAX1864/MAX1865 use a current-mode control
scheme that senses the current across the high-side
MOSFET (N H ). Immediately after the high-side MOSFET
has turned on, the MAX1864/MAX1865 use a 60ns cur-
rent-sense blanking period to minimize noise sensitivity.
When the MOSFET turns on, however, the transformer’s
secondary inductance and the diode’s parasitic capac-
itance form a resonant circuit that causes ringing.
Reflected back through the transformer to the primary
side, these oscillations across the high-side MOSFET
may last longer than the blanking period. A series RC
snubber circuit at the diode (Figure 6) increases the
damping factor, allowing the ringing to settle quickly.
Applications with multiple transformer windings require
only one snubber circuit on the highest output voltage.
Applications with low turn ratios (1:1), such as the
MAX1864 typical application circuit (Figure 1), may not
require a snubber curcuit.
The diode’s parasitic capacitance can be estimated
using the diode’s reverse voltage rating (V RRM ), current
capability (I O ), and recovery time (T RR ). A rough
approximation is:
I × t
V RRM
For the EC10QS10 Nihon diode used in figure 6, the
capacitance is roughly 15pF. The output snubber must
only dampen the ringing, so the initial turn-on spike that
occurs during the blanking period remains preset. A
100pF capacitor works well in most applications; larger
capacitance values require more charge, thereby
increasing the power dissipation.
The snubber’s time constant (t SNUB ) must be smaller
than the 100ns blanking time. A typical RC time con-
stant of approximately 30ns was chosen for Figure 6:
t SNUB 30 ns
C SNUB C SNUB
Minimum Load Requirements (Linear Regulators)
Under no-load conditions, leakage currents from the
pass transistors supply the output capacitor, even
when the transistor is off. Generally, this is not a prob-
lem since the feedback resistors’ current drains the
excess charge. However, charge may build up on the
output capacitor over temperature, making V LDO rise
above its set point. Care must be taken to ensure that
the feedback resistors’ current exceeds the pass tran-
sistor’s leakage current over the entire temperature
range.
Applications Information
PC Board Layout Guidelines
Careful PC board layout is critical to achieve low
switching losses and clean, stable operation. The
switching power stage requires particular attention.
Follow these guidelines for good PC board layout:
1) Place the power components first, with ground ter-
minals adjacent (N L source, C IN , C OUT ). If possible,
make all these connections on the top layer with
wide, copper-filled areas. Keep these high-current
paths short, especially at ground terminals.
2) Mount the MAX1864/MAX1865 adjacent to the
switching MOSFETs to keep IN-LX current-sense
lines, LX-GND current-limit sense lines, and the dri-
ver lines (DL and DH) short and wide. The current-
sense amplifier inputs are connected between IN
and LX, so these pins must be connected as close
as possible to the high-side MOSFET. The current-
limit comparator inputs are connected between LX
and GND, but accuracy is not as important, so give
priority to the high-side MOSFET connections. The
IN, LX, and GND connections to the MOSFETs must
be made using Kelvin sense connections to guaran-
tee current-sense and current-limit accuracy.
3) Group the gate-drive components (BST diode and
capacitor, IN bypass capacitor) together near the
MAX1864/MAX1865.
4) All analog grounding must be done to a separate
solid copper ground plane, which connects to the
MAX1864/MAX1865 at the GND pin. This includes
the VL bypass capacitor, feedback resistors, com-
pensation components (R COMP , C COMP ), and
adjustable current-limit threshold resistors connect-
ed to ILIM.
22
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