参数资料
型号: MAX1875A
厂商: Maxim Integrated Products, Inc.
英文描述: Dual 180?Out-of-Phase Buck Controllers with Sequencing/Prebias Startup and POR
中文描述: 双路、180°异相工作的buck控制器,具有排序/预偏置启动和POR
文件页数: 17/22页
文件大小: 553K
代理商: MAX1875A
M
Dual 180° Out-of-Phase Buck Controllers with
Sequencing/Prebias Startup and POR
______________________________________________________________________________________
17
The output voltage ripple as a consequence of the ESR
and output capacitance is:
where I
P-P
is the peak-to-peak inductor current (see the
Inductor Selection
section). These equations are suitable
for initial capacitor selection, but final values should be
verified by testing in a prototype or evaluation circuit.
As a general rule, a smaller inductor ripple current results
in less output ripple voltage. Since inductor ripple current
depends on the inductor value and input voltage, the out-
put ripple voltage decreases with larger inductance and
increases with higher input voltages. However, the induc-
tor ripple current also impacts transient-response perfor-
mance, especially at low V
IN
- V
OUT
differentials. Low
inductor values allow the inductor current to slew faster,
replenishing charge removed from the output filter capac-
itors by a sudden load step. The amount of output-volt-
age sag is also a function of the maximum duty factor,
which can be calculated from the minimum off-time and
switching frequency:
where t
OFF(MIN)
is the minimum off-time (see the
Electrical Characteristics
), and f
SW
is set by R
OSC
(see
the
Setting the Switching Frequency
section).
Compensation
Each voltage-mode controller section employs a
transconductance error amplifier whose output is the
compensation point of the control loop. The control loop
is shown in Figure 9. For frequencies much lower than
Nyquist, the PWM block can be simplified to a voltage
amplifier. Connect R
COMP_
and C
COMP_A
from COMP
to GND to compensate the loop (Figure 9). The inductor,
output capacitor, compensation resistor, and compen-
sation capacitors determine the loop stability. Since the
inductor and output capacitor are chosen based on per-
formance, size, and cost, select the compensation resis-
tor and capacitors to optimize control-loop stability.
To determine the loop gain (A
L
), consider the gain from
FB to COMP (A
COMP/FB
), from COMP to LX (A
LX/COMP
),
and from LX to FB (A
FB/LX
). The total loop gain is:
where:
assuming an ideal integrator, and assuming that
C
COMP_B
is much less than C
COMP_A
:
where V
RAMP
= 1V
P-P
:
Therefore:
For an ideal integrator, this loop gain approaches infinity
at DC. In reality the g
M
amplifier has a finite output
impedance, which imposes a finite, but large, loop gain.
It is this large loop gain that provides DC load accuracy.
The dominant pole occurs due to the integrator, and for
this analysis, it can be approximated to occur at DC.
R
COMP
creates a zero at:
The inductor and capacitor form a double pole at:
f
LC
LC
OUT
=
×
1
2
π
f
R
C
Z COMP A
_
COMP
COMP A
_
_
_
=
×
1
2
π
A
g
SC
V
V
OUT
SR
SR
V
V
SR
S LC
L
M COMP
_
COMP A
COMP COMP A
COMP COMP B
IN
RAMP
SET
ESR OUT
OUT
×
+
+
×
×
×
+
+
_
_
_
1
1
1
1
A
V
V
V
V
sR
S LC
SR
S LC
OUT
SR
V
V
V
FB LX
/
FB
LX
SET
OUT
+
1
ESR OUT
+
OUT
ESR OUT
SET
OUT
ESR OUT
OUT
=
=
+
+
+
1
1
1
A
V
V
V
V
LX COMP
/
LX
COMP
IN
RAMP
=
=
A
V
V
+
+
g
SC
sR
sR
COMP FB
COMP
FB
M COMP
_
COMP
COMP COMP A
COMP COMP B
/
_
_
=
×
1
1
A
A
A
A
L
COMP FB
LX COMP
/
FB LX
/
=
×
×
/
V
L I
I
V
V f
t
C
V
V
V f
t
SAG
LOAD
LOAD
OUT
OFF MIN
(
OUT OUT
IN
OUT
OFF MIN
(
=
+
(
)
)
)
1
2
2
2
-
-
-
V
I
V
I
C
I
V
V
f
L
V
V
RIPPLE ESR
P P ESR
-
RIPPL( )
P P
OUT SW
P P
-
IN
OUT
SW
OUT
IN
(
)
=
=
=
-
-
8
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