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参数资料
| 型号： | MAX187 |
| 厂商： | Maxim Integrated Products, Inc. |
| 元件分类： | ADC |
| 英文描述： | +5V, Low-Power, 12-Bit Serial ADCs(8.5μs转换时间，单通道，串行12位A/D转换器) |
| 中文描述： | +5V、低功耗、12位串行ADC |
| 文件页数： | 9/20页 |
| 文件大小： | 177K |
| 代理商： | MAX187 |
Track/Hold
In track mode, the analog signal is acquired and stored
in the internal hold capacitor. In hold mode, the T/H
switch opens and maintains a constant input to the
ADC’s SAR section.
During acquisition, the analog input AIN charges
capacitor C
HOLD
. Bringing
CS
low ends the acquisition
interval. At this instant, the T/H switches the input side
of C
to GND. The retained charge on C
rep-
resents a sample of the input, unbalancing the node
ZERO at the comparator’s input.
In hold mode, the capacitive DAC adjusts during the
remainder of the conversion cycle to restore node
ZERO to 0V within the limits of a 12-bit resolution. This
action is equivalent to transferring a charge from
C
to the binary-weighted capacitive DAC, which in
turn forms a digital representation of the analog input
signal. At the conversion’s end, the input side of C
switches back to AIN, and C
HOLD
charges to the input
signal again.
The time required for the T/H to acquire an input signal
is a function of how quickly its input capacitance is
charged. If the input signal’s source impedance is
high, the acquisition time lengthens and more time
must be allowed between conversions. Acquisition time
is calculated by:
t
ACQ
= 9 (R
S
+ R
IN
) 16pF,
where R
= 5k
, R
S
= the source impedance of the
input signal, and t
is never less than 1.5μs. Source
impedances below 5k
do not significantly affect the
AC performance of the ADC.
M
+5V, Low-Power, 12-Bit S erial ADCs
_______________________________________________________________________________________
9
AIN
TRACKINPUT
HOLD
CPACKAGE
GND
TRACK
HOLD
5k
R
IN
CHOLD
16pF
-
+
CSWITCH
COMPARATOR
ZERO
REF
12-BIT CAPACITIVE DAC
AT THE SAMPLING INSTANT,
THE INPUT SWITCHES FROM
AIN TOGND.
ON
OFF
REFERENCE
INPUT
SHUTDOWN
INPUT
ANALOG INPUT
0V TO+5V
+5V
1
2
3
4
VDD
AIN
SHDN
REF
8
7
6
5
SCLK
CS
DOUT
GND
SERIAL
INTERFACE
0.1
μ
F
4.7
μ
F
0.1
μ
F
MAX189
ON
OFF
SHUTDOWN
INPUT
ANALOG INPUT
0V TO+5V
+5V
1
2
3
4
VDD
AIN
SHDN
REF
8
7
6
5
SCLK
CS
DOUT
GND
SERIAL
INTERFACE
4.7
μ
F
4.7
μ
F
0.1
μ
F
MAX187
Figure 3a. MAX187 Operational Diagram
Figure 3b. MAX189 Operational Diagram
Figure 4. Equivalent Input Circuit
相关PDF资料 |
PDF描述 |
|---|---|
| MAX189 | +5V, Low-Power, 12-Bit Serial ADCs(8.5μs转换时间，单通道，串行12位A/D转换器) |
| MAX187ACWE | Fixed-Point Digital Signal Processor 288-BGA MICROSTAR |
| MAX187AMJA | Fixed-Point Digital Signal Processor 288-BGA MICROSTAR |
| MAX187CEPA | +5V, Low-Power, 12-Bit Serial ADCs |
| MAX189CEPA | 031-0560-161 |
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