参数资料
型号: MAX192AEWP
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: ADC
英文描述: Low-Power, 8-Channel, Serial 10-Bit ADC
中文描述: 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
封装: SO-20
文件页数: 17/24页
文件大小: 201K
代理商: MAX192AEWP
M
Low-Power, 8-Channel,
S erial 10-Bit ADC
______________________________________________________________________________________
17
1
0 0
DIN
REFADJ
VREF
2.5V
0V
4V
0V
1
01
1
1
1
1
00
1
01
FULLPD
FASTPD
NOPD
FULLPD
FASTPD
2ms WAIT
COMPLETE CONVERSION SEQUENCE
t
BUFFEN
15
μ
s
τ
= RC = 20k
x C
REFADJ
(ZEROS)
CH1
CH7
(ZEROS)
Figure 13. FULLPD/FASTPD Power-Up Sequence
RC filter with the internal 20k
reference resistor with a
0.2ms time constant. To achieve full 10-bit accuracy,
10 time constants or 2ms are required after power-up.
Waiting 2ms in FASTPD mode instead of full power-up
will reduce the power consumption by a factor of 10 or
more. This is achieved by using the sequence shown in
Figure 13.
Lowest Power at Higher Throughputs
Figure 14b shows the power consumption with
external-reference compensation in fast power-down,
with one and eight channels converted. The external
4.7μF compensation requires a 50μs wait after
power-up, accomplished by 75 idle clocks after a
dummy conversion. This circuit combines fast
multi-channel conversion with lowest power consump-
tion possible. Full power-down mode may provide
increased power savings in applications where the
1000
1
0
100
300
500
FULL POWER-DOWN
10
100
M
CONVERSIONS PER CHANNEL PER SECOND
200
400
2ms FASTPD WAIT
400kHz EXTERNAL CLOCK
INTERNAL COMPENSATION
8 CHANNELS
1 CHANNEL
A
μ
A
10,000
10
0
FAST POWER-DOWN
100
1000
CONVERSIONS PER CHANNEL PER SECOND
8 CHANNELS
1 CHANNEL
4k
8k
12k
16k
2MHz EXTERNAL CLOCK
EXTERNAL COMPENSATION
50μs WAIT
A
μ
A
M
3.0
2.5
2.0
1.5
1.0
0.5
0
0.0001
0.001
0.01
0.1
1
10
TIME IN SHUTDOWN (sec)
P
Figure 14a.
400kHz Clock
Supply Current vs. Sample Rate/Second, FULLPD,
Figure 14b. Supply Current vs. Sample Rate/Second, FASTPD,
2MHz Clock
Figure 14c. Typical Power-Up Delay vs. Time in Shutdown
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