- 您现在的位置：买卖IC网 > PDF目录15488 > MAX1962EEP+ (Maxim Integrated Products)IC REG CTRLR BUCK PWM VM 20-QSOP PDF资料下载
参数资料
| 型号： | MAX1962EEP+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 15/29页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 20-QSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 50 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 1.12MHz |
| 占空比： | 90% |
| 电源电压： | 2.35 V ~ 5.5 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 20-SSOP（0.154"，3.90mm 宽） |
| 包装： | 管件 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页当前第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页
2.35V to 5.5V, 0.5% Accurate, 1MHz PWM
Step-Down Controllers with Voltage Margining
Output Capacitor Selection
The RMS input ripple current is given by:
The output filter capacitor must have low enough effective
series resistance (ESR) to meet output ripple and load
transient requirements. In addition, the capacitance value
must be high enough to absorb the inductor energy
I RMS = I LOAD ×
V OUT × ( V IN - V OUT )
V IN
during load steps.
In applications where the output is subject to large load
transients, low ESR is needed to prevent the output
from dipping too low (V DIP ) during a load step:
For optimal circuit reliability, choose a capacitor that
has less than 10°C temperature rise at the peak ripple
current.
Compensation and Stability
R ESR ≤
V DIP
I LOADSTEP ( MAX )
Compensation with Ceramic Output Capacitors
The high switching frequency range of the
MAX1960/MAX1961/MAX1962 allows the use of ceramic
In applications with less severe load steps, maximum
ESR may be governed by what is needed to maintain
acceptable output voltage ripple:
output capacitors. Since the ESR of ceramic capacitors
is very low typically, the frequency of the associated
transfer function zero is higher than the unity-gain
crossover frequency and the zero cannot be used to
R ESR ≤
V RIPPLE ( P ? P )
LIR × I LOAD ( MAX )
compensate for the double pole created by the output
inductor and capacitor. The solution is Type 3 compen-
sation (Figure 5), which takes advantage of local feed-
To satisfy both load step and ripple requirements,
select the lowest value from the above two equations.
The capacitor is usually selected by physical size, ESR,
and voltage rating, rather than by capacitance value.
back to create two zeros and three poles (Figure 6). The
frequency of the poles and zeros are described below:
f P1 = 0
With current tantalum, electrolytic, and polymer capaci-
tor technology, the bulk capacitance will also be suffi-
cient once the ESR requirement is satisfied.
f P2 =
1
2 π × R 2 × C 3
When using low-capacity filter capacitors such as
ceramic, capacitor size is usually determined by the
capacitance needed to prevent voltage undershoot
and overshoot during load transients. The overshoot
f P3 =
1
2 π × R 1 ×
C1 × C2
C 1 + C 2
L × ( I PEAK )
V SOAR =
f LC =
f Z1 =
voltage (V SOAR ) is given by:
2
2 × V OUT × C OUT
Generally, once enough capacitance is in place to meet
the overshoot requirement, undershoot at the rising load
1
2 π L 0 × C 0
1
2 π × R 1 × C 1
edge is no longer a problem.
Input Capacitor Selection
The input capacitor (C IN ) reduces the current peaks
f Z2 =
1
2 π × ( R 2 + R 3 ) × C 3
drawn from the input supply and reduces noise injec-
tion. The source impedance to the input supply largely
determines the value of C IN . High source impedance
f ZESR =
1
2 π × R ESR × C 0
requires high input capacitance. The input capacitor
must meet the ripple current requirement (I RMS )
Unity-gain crossover frequency:
imposed by the switching currents.
f 0 = R 1 × C 3 ×
V IN ( MAX )
V RAMP
×
1
2 π × L 0 × C 0
______________________________________________________________________________________
15
相关PDF资料 |
PDF描述 |
|---|---|
| GEC49DRYH-S93 | CONN EDGECARD 98POS DIP .100 SLD |
| MAX1858AEEG+ | IC REG CTRLR BUCK PWM VM 24-QSOP |
| GBC30DRYH-S93 | CONN EDGECARD 60POS DIP .100 SLD |
| GBC31DRTS-S93 | CONN EDGECARD 62POS DIP .100 SLD |
| MAX1876AEEG+ | IC REG CTRLR BUCK PWM VM 24-QSOP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX1962EEP+ | 功能描述:DC/DC 开关控制器 1MHz PWM Step-Down RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| MAX1962EEP+T | 功能描述:DC/DC 开关控制器 1MHz PWM Step-Down RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| MAX1962EEP-T | 功能描述:DC/DC 开关控制器 RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| MAX1963AETT120+T | 功能描述:低压差稳压器 - LDO Low Input Voltage 300mA LDO Regulators with RESET in SOT and TDFN RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| MAX1963AETT150+T | 功能描述:低压差稳压器 - LDO Low-Input-Voltage 300mA LDO Regulators with RESET in SOT and TDFN RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
发布紧急采购，3分钟左右您将得到回复。