参数资料
型号: MAX19700ETM+T
厂商: Maxim Integrated Products
文件页数: 32/32页
文件大小: 0K
描述: IC ANLG FRNT END 48-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
位数: 10
通道数: 2
功率(瓦特): 36.3mW
电压 - 电源,模拟: 3V
电压 - 电源,数字: 3V
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-TQFN-EP(7x7)
包装: 带卷 (TR)
MAX19700
7.5Msps, Ultra-Low-Power
Analog Front-End
_______________________________________________________________________________________
9
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 3V, OVDD = 1.8V, internal reference (1.024V), CL ≈ 10pF on all digital outputs, fCLK = 7.5MHz (50% duty cycle), ADC input
amplitude = -0.5dBFS, DAC output amplitude = 0dBFS, differential ADC input, differential DAC output, CREFP = CREFN = CCOM =
0.33F. Typical values are at TA = +25°C, unless otherwise noted. CL < 5pF on all aux-DAC outputs.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL OUTPUTS (D0–D9, DR)
Output-Voltage Low
VOL
ISINK = 200A
0.2 x
OVDD
V
Output-Voltage High
VOH
ISOURCE = 200A
0.8 x
OVDD
V
Tri-State Leakage Current
ILEAK
-1
+1
A
Tri-State Output Capacitance
COUT
5pF
Note 1: Specifications from TA = +25°C to +85°C are guaranteed by production tests. Specifications from TA = +25°C to -40°C are
guaranteed by design and characterization.
Note 2: The minimum clock frequency for the MAX19700 is 2MHz.
Note 3: SNR, SINAD, SFDR, HD3, and THD are based on a differential analog input voltage of -0.5dBFS referenced to the amplitude
of the digital outputs. SINAD and THD are calculated using HD2 through HD6.
Note 4: Crosstalk rejection is measured by applying a high-frequency test tone to one channel and a low-frequency tone to the second
channel. FFTs are performed on each channel. The parameter is specified as the power ratio of the first and second channel
FFT test tone.
Note 5: Amplitude and phase matching is measured by applying the same signal to each channel, and comparing the two output
signals using a sine-wave fit.
Note 6: Guaranteed by design and characterization.
Typical Operating Characteristics
(VDD = 3V, OVDD = 1.8V, internal reference (1.024V), CL ≈ 10pF on all digital outputs, fCLK = 7.5MHz 50% duty cycle, ADC input
amplitude = -0.5dBFS, DAC output amplitude = 0dBFS, differential ADC input, differential DAC output, CREFP = CREFN = CCOM =
0.33F, TA = +25°C, unless otherwise noted.)
Rx ADC CHANNEL-IA FFT PLOT
MAX19700
toc01
FREQUENCY (MHz)
AMPLITUDE
(dBFS)
3.0
2.0
1.0
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-100
0
3.5
2.5
1.5
0.5
fCLK = 7.5MHz
fIA = 2MHz
AIA = -0.5dBFS
8192-POINT
DATA RECORD
HD3
HD2
IA
Rx ADC CHANNEL-QA FFT PLOT
MAX19700
toc02
FREQUENCY (MHz)
AMPLITUDE
(dBFS)
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-100
fCLK = 7.5MHz
fQA = 2MHz
AQA = -0.5dBFS
8192-POINT
DATA RECORD
HD3
HD2
3.0
2.0
1.0
0
3.5
2.5
1.5
0.5
QA
Rx ADC CHANNEL-IA
TWO-TONE FFT PLOT
MAX19700
toc03
FREQUENCY (MHz)
AMPLITUDE
(dBFS)
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-100
fCLK = 7.5MHz
f1 = 2.0MHz
f2 = 2.1MHz
AIA = -7dBFS
PER TONE
8192-POINT
DATA RECORD
3.0
2.0
1.0
0
3.5
2.5
1.5
0.5
f1
f2
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