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参数资料
| 型号： | MAX19705 |
| 厂商： | Maxim Integrated Products, Inc. |
| 英文描述： | 10-Bit, 45Msps, Ultra-Low-Power Analog Front-End |
| 中文描述： | 10位、7.5Msps、超低功耗模拟前端 |
| 文件页数： | 9/37页 |
| 文件大小： | 561K |
| 代理商： | MAX19705 |
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M
10-Bit, 45Msps, Ultra-Low-Power
Analog Front-End
_______________________________________________________________________________________
9
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3V, OV
DD
= 1.8V, internal reference (1.024V), C
L
≈
10pF on all digital outputs, f
CLK
= 45MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, differential Rx ADC input, differential Tx DAC output, C
REFP
= C
REFN
=
C
COM
= 0.33μF, unless otherwise noted. C
L
< 5pF on all aux-DAC outputs. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
DIGITAL INPUTS (CLK,
SCLK, DIN,
CS
, D0–D9, T/
R
,
SHDN
)
Input High Threshold
V
INH
Input Low Threshold
V
INL
D0–D9, CLK, SCLK, DIN,
CS
, T/
R
,
SHDN
= OGND or OV
DD
Input Capacitance
DC
IN
DIGITAL OUTPUTS (D0–D9, DOUT)
Output-Voltage Low
V
OL
I
SINK
= 200μA
Output-Voltage High
V
OH
I
SOURCE
= 200μA
Tri-State Leakage Current
I
LEAK
Tri-State Output Capacitance
C
OUT
MIN
TYP
MAX
UNITS
0.7 x OV
DD
V
V
0.3 x OV
DD
Input Leakage
DI
IN
-1
+1
μA
5
pF
0.2 x OV
DD
V
V
μA
pF
0.8 x OV
DD
-1
+1
5
Note 1:
Specifications from T
A
= +25°C to +85°C are guaranteed by production tests. Specifications from T
A
= +25°C to -40°C are
guaranteed by design and characterization.
Note 2:
The minimum clock frequency (f
CLK
) for the MAX19707 is 7.5MHz (typical). The minimum aux-ADC sample rate clock fre-
quency (ACLK) is determined by f
CLK
and the chosen aux-ADC clock-divider value. The minimum aux-ADC ACLK >
7.5MHz / 128 = 58.6kHz. The aux-ADC conversion time does not include the time to clock the serial data out of the SPI.
The maximum conversion time (for no averaging, NAVG = 1) will be, t
CONV
(max) = (12 x 1 x 128) / 7.5MHz = 205μs.
Note 3:
SNR, SINAD, SFDR, HD3, and THD are based on a differential analog input voltage of -0.5dBFS referenced to the amplitude
of the digital outputs. SINAD and THD are calculated using HD2 through HD6.
Note 4:
Crosstalk rejection is measured by applying a high-frequency test tone to one channel and a low-frequency tone to the second
channel. FFTs are performed on each channel. The parameter is specified as the power ratio of the first and second channel
FFT test tone.
Note 5:
Amplitude and phase matching is measured by applying the same signal to each channel, and comparing the two output
signals using a sine-wave fit.
Note 6:
Guaranteed by design and characterization.
SPI is a trademark of Motorola, Inc.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX19705ETM | 功能描述:ADC / DAC多通道 RoHS:否 制造商:Texas Instruments 转换速率: 分辨率:8 bit 接口类型:SPI 电压参考: 电源电压-最大:3.6 V 电源电压-最小:2 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-40 |
| MAX19705ETM+ | 功能描述:ADC / DAC多通道 7.5Msps CODEC/AFE 1.8/2.7-3.3V RoHS:否 制造商:Texas Instruments 转换速率: 分辨率:8 bit 接口类型:SPI 电压参考: 电源电压-最大:3.6 V 电源电压-最小:2 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-40 |
| MAX19705ETM+GH7 | 功能描述:ADC / DAC多通道 10-Bit 7.5Msps Ultra-Low-Power Analog Front-End RoHS:否 制造商:Texas Instruments 转换速率: 分辨率:8 bit 接口类型:SPI 电压参考: 电源电压-最大:3.6 V 电源电压-最小:2 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-40 |
| MAX19705ETM+T | 功能描述:ADC / DAC多通道 7.5Msps CODEC/AFE 1.8/2.7-3.3V RoHS:否 制造商:Texas Instruments 转换速率: 分辨率:8 bit 接口类型:SPI 电压参考: 电源电压-最大:3.6 V 电源电压-最小:2 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-40 |
| MAX19705ETM+TGH7 | 功能描述:ADC / DAC多通道 10-bit 7.5Msps Ultra-Low-Power Analog Front-End RoHS:否 制造商:Texas Instruments 转换速率: 分辨率:8 bit 接口类型:SPI 电压参考: 电源电压-最大:3.6 V 电源电压-最小:2 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-40 |
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