参数资料
型号: MAX2014ETA-T
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: 模拟信号调理
英文描述: 50MHz to 1000MHz, 75dB Logarithmic Detector/Controller
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO8
封装: 3 X 3 MM, 0.80 MM HEIGHT, TDFN-8
文件页数: 9/10页
文件大小: 288K
代理商: MAX2014ETA-T
M
50MHz to 1000MHz, 75dB Logarithmic
Detector/Controller
_______________________________________________________________________________________
9
Controller Mode
The MAX2014 can also be used as a detector/controller
within an AGC loop. Figure 3 depicts one scenario
where the MAX2014 is employed as the controller for a
variable-gain PA. As shown in the figure, the MAX2014
monitors the output of the PA through a directional cou-
pler. An internal integrator (Figure 2) compares the
detected signal with a reference voltage determined by
V
SET
. The integrator, acting like a comparator, increas-
es or decreases the voltage at OUT, according to how
closely the detected signal level matches the V
SET
ref-
erence. The MAX2014 adjusts the power of the PA to a
level determined by the voltage applied to SET. With R1 =
0
Ω
, the controller mode slope is approximately
19mV/dB (RF = 100MHz).
Layout Considerations
As with any RF circuit, the layout of the MAX2014 circuit
affects the device’s performance. Use an abundant num-
ber of ground vias to minimize RF coupling. Place the
input capacitors (C1, C2) and the bypass capacitors
(C3–C6) as close to the IC as possible. Connect the
bypass capacitors to the ground plane with multiple vias.
MAX2014
C6
R4
C1
C5
1
2
OUT
SET
V
S
C4
C3
4
V
CC
V
CC
INLO
V
OUT
V
SET
20k
Ω
20k
Ω
INHI
7
8
RFIN
C2
3
DETECTORS
GND
6
PWDN
5
Figure 2. Controller-Mode Typical Application Circuit
MAX2014
OUT
SET
20k
Ω
20k
Ω
IN
COUPLER
LOGARITHMIC
DETECTOR
TRANSMITTER
POWER AMPLIFIER
GAIN-CONTROL INPUT
SET-POINT
DAC
Figure 3. System Diagram for Automatic Gain-Control Loop
1
3
4
8
6
5
MAX2014
2
7
TDFN
TOP VIEW
OUT
SET
GND PWDN
V
CC
INHI
INLO
V
CC
Pin Configuration
Chip Information
PROCESS: BiCMOS
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