参数资料
型号: MAX2232EEE+T
厂商: Maxim Integrated
文件页数: 7/8页
文件大小: 0K
描述: IC AMP POWER 900MHZ 16QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
频率: 902MHz ~ 928MHz
增益: 23.9dB
RF 型: ISM
电源电压: 2.7 V ~ 5.5 V
电流 - 电源: 20.3mA ~ 25mA
封装/外壳: 16-LSSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
900MHz ISM-Band, 250mW Power Amplifiers
with Analog or Digital Gain Control
___________________________MAX2233
Digital Gain Control
and Power Management
The MAX2233 responds to logic-level signals at the
device ’s 2-bit DAC inputs, D0 and D1, placing the
device in shutdown mode or into one of three discrete
output power levels. See Table 2 for operating modes
and output power levels. Setting D0 and D1 to a logic-
level low places the device in shutdown mode and
reduces supply current to 0.2μA. The VGA, driver, and
output stage are off in shutdown mode, while the input
impedance is only slightly changed. Setting D0 and D1
to one of the other three modes adjusts the output
power to one of three discrete levels in 10dB steps.
Thermal Shutdown
The MAX2232/MAX2233 feature a thermal shutdown
mode that helps to protect the device from damage
when the die temperature becomes excessive. If the
temperature of the die exceeds the thermal shutdown
temperature, T TH , the VGA is forced into a low-gain
mode and output power is reduced to a minimum. After
Table 1. MAX2232 Operating Modes
OUTPUT POWER
the PA’s die temperature drops below T TH , the device
remains in thermal shutdown mode for the thermal shut-
down timeout period, t TH . A single capacitor, C TSET ,
from TSET to ground sets t TH . The thermal shutdown
timeout period helps to limit device thermal cycling that
results if the source of the excessive temperature is not
removed. t TH is set by the value of C TSET .
Applications Information
Proper attention to voltage supply bypassing is essen-
tial for high-frequency RF circuit stability. Bypass V CC
with 0.1μF, 10nF, and 100pF capacitors in parallel with
each other to ground. Use separate vias to the ground
plane for each of the bypass capacitors and minimize
trace length to reduce inductance. Use separate vias to
the ground plane for each ground pin. Use low-induc-
tance ground connections.
Decouple SHDN , CTRL, D0, and D1 with 0.1μF capaci-
tors to ground to minimize noise on the internal bias cell.
Use a series resistor (typically 100 ? ) to further reduce
coupling of high-frequency signals into the control pins.
Table 2. MAX2233 Operating Modes
Truth Table
MODE
Shutdown
Standby
Variable Gain
Maximum Gain
V SHDN
< 0.6V
> 2.0V
> 2.0V
> 2.0V
V CTRL
X
≤ 0.4V
0.6V ≤ V CTRL
< 2.2V
> 2.2V
(P RFIN = 0dBm,
V CC = +3.6V)
< -35dBm
< -35dBm
0dBm to +24dBm
+24 dBm
MODE
Shutdown
Low Power
Medium Power
High Power
D1
0
0
1
1
D0
0
1
0
1
OUTPUT POWER
(P RFIN = 0dBm,
V CC = +3.6V)
< -35dBm
+6.5dBm
+15dBm
+24dBm
X = Don’t care
Functional Diagrams
V CC
GND
V CC
GND
16 15
16
15
RAMP+
RAMP-
14
13
BIAS
MAX2232
BIAS
MAX2233
SHDN
V CC
CTRL
V CC
3
11
4
12
TEMP
SENSOR
10
8
TSET
RFOUT
D0
D1
V CC
V CC
4
3
11
12
2-BIT
DAC
TEMP
SENSOR
10
8
TSET
RFOUT
RFIN
1
RFIN
1
VGA
DRIVER
VGA
DRIVER
2
GND
5, 6
GND
7, SLUG
GND
2
GND
5, 6
GND
7, SLUG
GND
_______________________________________________________________________________________
7
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